| /external/llvm/test/MC/Mips/micromips64r6/ |
| D | relocations.s | 20 # CHECK-FIXUP: ldpc $2, bar # encoding: [0x78,0b010110AA,A,A]
46 ldpc $2, bar
|
| D | valid.s | 26 ldpc $2, 16 # CHECK: ldpc $2, 16 # encoding: [0x78,0x58,0x00,0x02]
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| D | relocations.s | 37 # CHECK-FIXUP: ldpc $2, bar # encoding: [0xec,0b010110AA,A,A]
74 ldpc $2,bar
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/ |
| D | relocations.s | 40 # CHECK-FIXUP: ldpc $2, bar # encoding: [0xec,0b010110AA,A,A]
79 ldpc $2,bar
|
| /external/llvm/test/MC/Mips/ |
| D | relocation.s | 235 ldpc $2, foo // RELOC: R_MIPS_PC18_S3 foo
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
| D | relocation.s | 254 ldpc $2, foo // RELOC: R_MIPS_PC18_S3 foo
|
| /external/llvm/test/ExecutionEngine/RuntimeDyld/Mips/ |
| D | ELF_N64R6_relocations.s | 27 ldpc $6,foo
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/ExecutionEngine/RuntimeDyld/Mips/ |
| D | ELF_N64R6_relocations.s | 28 ldpc $6,foo
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips64r6InstrInfo.td | 73 class LDPC_DESC : PCREL_DESC_BASE<"ldpc", GPR64Opnd, simm18_lsl3, II_LDPC>;
|
| D | MicroMips64r6InstrInfo.td | 191 class LDPC_MM64R6_DESC : PCREL_MMR6_DESC_BASE<"ldpc", GPR64Opnd, simm18_lsl3>;
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 128 0x48 0x3c 0x58 0xec # CHECK: ldpc $2, 123456
|
| D | valid-mips64r6.txt | 210 0xec 0x58 0x3c 0x48 # CHECK: ldpc $2, 123456
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | Mips64r6InstrInfo.td | 75 class LDPC_DESC : PCREL_DESC_BASE<"ldpc", GPR64Opnd, simm18_lsl3, II_LDPC>;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 134 0x48 0x3c 0x58 0xec # CHECK: ldpc $2, 123456
|
| D | valid-mips64r6.txt | 220 0xec 0x58 0x3c 0x48 # CHECK: ldpc $2, 123456
|
| /external/llvm/test/MC/Disassembler/Mips/micromips64r6/ |
| D | valid.txt | 147 0x78 0x58 0x00 0x02 # CHECK: ldpc $2, 16
|
| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 945 void ldpc(Register rs, int32_t offset18);
|
| D | assembler-mips64.cc | 2593 void Assembler::ldpc(Register rs, int32_t offset18) { in ldpc() function in v8::internal::Assembler
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenAsmMatcher.inc | 4938 "di.d\005ldi.h\005ldi.w\003ldl\004ldpc\003ldr\005ldxc1\002lh\003lhe\003l"
6456 …{ 5493 /* ldpc */, Mips::LDPC, Convert__GPR64AsmReg1_0__JumpTarget1_1, Feature_HasStdEnc|Feature_H…
9708 { Feature_HasStdEnc|Feature_HasMips64r6, 5493 /* ldpc */, MCK_GPR64AsmReg, 1 /* 0 */ },
9709 { Feature_HasStdEnc|Feature_HasMips64r6, 5493 /* ldpc */, MCK_JumpTarget, 2 /* 1 */ },
|