| /external/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_blend.c | 43 bool alpha_enable, logicop_enable; in etna_blend_state_create() local
84 logicop_enable = so->logicop_enable && in etna_blend_state_create()
88 VIVS_PE_LOGIC_OP_OP(logicop_enable ? so->logicop_func : LOGIC_OP_COPY) | in etna_blend_state_create()
91 co->fo_allowed = !alpha_enable && !logicop_enable; in etna_blend_state_create()
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| /external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| D | fd4_blend.c | 67 if (cso->logicop_enable) { in fd4_blend_state_create()
120 COND(cso->logicop_enable, A4XX_RB_MRT_CONTROL_ROP_ENABLE) | in fd4_blend_state_create()
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| /external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_blend.c | 66 if (cso->logicop_enable) { in fd5_blend_state_create()
121 COND(cso->logicop_enable, A5XX_RB_MRT_CONTROL_ROP_ENABLE) | in fd5_blend_state_create()
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| /external/mesa3d/src/gallium/drivers/freedreno/ |
| D | freedreno_state.h | 47 return ctx->blend && ctx->blend->logicop_enable; in fd_logicop_enabled()
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| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | fd2_blend.c | 67 if (cso->logicop_enable) in fd2_blend_state_create()
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| /external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| D | fd3_blend.c | 69 if (cso->logicop_enable) { in fd3_blend_state_create()
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| /external/virglrenderer/src/gallium/include/pipe/ |
| D | p_state.h | 276 unsigned logicop_enable:1; member
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_atom_blend.c | 206 blend->logicop_enable = 1; in st_update_blend()
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_state.h | 344 unsigned logicop_enable:1; member
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| /external/mesa3d/src/gallium/docs/source/cso/ |
| D | blend.rst | 74 logicop_enable section in Members
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_state.h | 59 bool logicop_enable:1; member
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| D | si_state.c | 482 blend->logicop_enable = state->logicop_enable; in si_create_blend_state_mode()
484 if (state->logicop_enable) { in si_create_blend_state_mode()
649 if (blend->dual_src_blend || state->logicop_enable || in si_create_blend_state_mode()
704 old_blend->logicop_enable != blend->logicop_enable))) in si_bind_blend_state()
3269 if (colormask && blend->logicop_enable) in si_out_of_order_rasterization()
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| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| D | lp_bld_blend_aos.c | 363 if (blend->logicop_enable) { in lp_build_blend_aos()
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_pipe_blend.c | 158 if (templ->logicop_enable) { in svga_create_blend_state()
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| /external/mesa3d/src/gallium/auxiliary/util/ |
| D | u_dump_state.c | 605 util_dump_member(stream, bool, state, logicop_enable); in util_dump_blend_state()
606 if (state->logicop_enable) { in util_dump_blend_state()
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| /external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| D | nv30_state.c | 52 if (cso->logicop_enable) { in nv30_blend_state_create()
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| /external/mesa3d/src/gallium/drivers/softpipe/ |
| D | sp_quad_blend.c | 987 if (blend->logicop_enable) { in blend_fallback()
1230 else if (!softpipe->blend->logicop_enable && in choose_blend_quad()
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| /external/mesa3d/src/gallium/drivers/vc5/ |
| D | vc5_program.c | 353 if (vc5->blend->logicop_enable) { in vc5_update_compiled_fs()
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| /external/mesa3d/src/gallium/auxiliary/vl/ |
| D | vl_zscan.c | 315 blend.logicop_enable = 0; in init_state()
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| D | vl_mc.c | 409 blend.logicop_enable = 0; in init_pipe_state()
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| D | vl_idct.c | 534 blend.logicop_enable = 0; in init_state()
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| /external/mesa3d/src/gallium/drivers/trace/ |
| D | tr_dump_state.c | 426 trace_dump_member(bool, state, logicop_enable); in trace_dump_blend_state()
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| /external/mesa3d/src/gallium/state_trackers/vdpau/ |
| D | output.c | 609 blend.logicop_enable = 0; in BlenderToPipe()
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| /external/mesa3d/src/gallium/tools/trace/ |
| D | dump_state.py | 261 if not state.logicop_enable:
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| /external/mesa3d/src/gallium/drivers/i915/ |
| D | i915_state.c | 144 if (blend->logicop_enable) in i915_create_blend_state()
|