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Searched refs:lwp (Results 1 – 25 of 50) sorted by relevance

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/external/google-breakpad/src/client/solaris/handler/
Dminidump_generator.cc234 MDRawThread *lwp) { in WriteCrashedLwpStream() argument
237 lwp->thread_id = lsp->pr_lwpid; in WriteCrashedLwpStream()
244 &lwp->stack)) in WriteCrashedLwpStream()
250 lwp->thread_context = context.location(); in WriteCrashedLwpStream()
258 &lwp->stack)) in WriteCrashedLwpStream()
264 lwp->thread_context = context.location(); in WriteCrashedLwpStream()
274 const lwpstatus_t *lsp, MDRawThread *lwp) { in WriteLwpStream() argument
282 &lwp->stack)) in WriteLwpStream()
290 lwp->thread_id = lsp->pr_lwpid; in WriteLwpStream()
291 lwp->thread_context = context.location(); in WriteLwpStream()
[all …]
/external/libpcap/
Dpcap-libdlpi.c76 linkwalk_t *lwp = arg; in list_interfaces() local
80 lwp->lw_err = ENOMEM; in list_interfaces()
85 if (lwp->lw_list == NULL) { in list_interfaces()
86 lwp->lw_list = entry; in list_interfaces()
88 entry->lnl_next = lwp->lw_list; in list_interfaces()
89 lwp->lw_list = entry; in list_interfaces()
/external/llvm/test/MC/Mips/
Dmicromips-loadstore-instructions.s46 # CHECK-EL: lwp $16, 8($4) # encoding: [0x04,0x22,0x08,0x10]
92 # CHECK-EB: lwp $16, 8($4) # encoding: [0x22,0x04,0x10,0x08]
135 lwp $16, 8($4)
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dmicromips-loadstore-instructions.s66 # CHECK-EL: lwp $16, 8($4) # encoding: [0x04,0x22,0x08,0x10]
125 # CHECK-EB: lwp $16, 8($4) # encoding: [0x22,0x04,0x10,0x08]
161 lwp $16, 8($4)
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips/
Dinvalid.s102 lwp $31, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
104 lwp $16, 8($34) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
105 …lwp $16, 4096($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offs…
106 …lwp $16, 8($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
Dvalid.s278 lwp $16, 8($4) # CHECK: lwp $16, 8($4) # encoding: [0x22,0x04,0x10,0x08] label
/external/llvm/test/MC/Mips/micromips/
Dinvalid.s102 lwp $31, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
104 …lwp $16, 8($34) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offs…
105 …lwp $16, 4096($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offs…
106 …lwp $16, 8($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
/external/honggfuzz/netbsd/
Dtrace.c154 pid_t pid, lwpid_t lwp, register_t* pc, register_t* status_reg HF_ATTR_UNUSED) { in arch_getPC() argument
157 if (ptrace(PT_GETREGS, pid, &r, lwp) != 0) { in arch_getPC()
173 static void arch_getInstrStr(pid_t pid, lwpid_t lwp, register_t* pc, char* instr) { in arch_getInstrStr() argument
184 size_t pcRegSz = arch_getPC(pid, lwp, pc, &status_reg); in arch_getInstrStr()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/micromips-sizereduction/
Dmicromips-lwp-swp.ll22 ; CHECK-NEXT: lwp $16, 20($sp)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dlwp-intrinsics.ll2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+lwp | FileCheck %s --check-prefix=X86
7 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+lwp | FileCheck %s --check-prefix=X64
Dlwp-intrinsics-x86_64.ll2 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+lwp | FileCheck %s --check-prefix=X64
Dstack-folding-lwp.ll1 ; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+lwp < %s | FileCheck %s
Dlwp-schedule.ll2 ; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=x86-64 -mattr=+lwp | FileCheck %s --c…
/external/llvm/test/MC/Mips/micromips32r6/
Dinvalid.s207 lwp $31, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
209 …lwp $16, 8($34) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed…
210 …lwp $16, 4096($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed…
211 …lwp $16, 8($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be dif…
Dvalid.s336 lwp $16, 8($4) # CHECK: lwp $16, 8($4) # encoding: [0x22,0x04,0x10,0x08]
/external/icu/icu4c/source/config/
Dmh-solaris56 #LIBRARY_PATH_PREFIX=/usr/lib/lwp:
/external/llvm/test/MC/Mips/micromips64r6/
Dinvalid.s239 …lwp $31, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
241 …lwp $16, 8($34) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit si…
242 …lwp $16, 4096($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit si…
243 …lwp $16, 8($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be…
Dvalid.s270 lwp $16, 8($4) # CHECK: lwp $16, 8($4) # encoding: [0x22,0x04,0x10,0x08]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/
Dinvalid.s218 lwp $31, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
220 lwp $16, 8($34) # CHECK: :[[@LINE]]:14: error: invalid register number
221 …lwp $16, 4096($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed…
222 …lwp $16, 8($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be dif…
Dvalid.s385 lwp $16, 8($4) # CHECK: lwp $16, 8($4) # encoding: [0x22,0x04,0x10,0x08]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Support/Unix/
DThreading.inc36 #include <lwp.h> // For _lwp_self()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/X86/
Dpr23997.ll106 …s,-avx512er,-avx512vnni,-avx512vpopcntdq,-clwb,-avx512f,-clzero,-pku,+mmx,-lwp,-rdpid,-xop,+rdseed…
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt166 0x04 0x22 0x08 0x10 # CHECK: lwp $16, 8($4)
Dvalid.txt166 0x22 0x04 0x10 0x08 # CHECK: lwp $16, 8($4)
/external/ImageMagick/PerlMagick/t/reference/write/composite/
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