1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=x86-64 -mattr=+lwp | FileCheck %s --check-prefix=GENERIC 3; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=bdver1 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER1 4; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER2 5; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=bdver3 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER3 6; RUN: llc < %s -mtriple=x86_64-unknown -print-schedule -mcpu=bdver4 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER4 7 8define void @test_llwpcb(i8 *%a0) nounwind { 9; GENERIC-LABEL: test_llwpcb: 10; GENERIC: # %bb.0: 11; GENERIC-NEXT: llwpcb %rdi # sched: [100:0.33] 12; GENERIC-NEXT: retq # sched: [1:1.00] 13; 14; BDVER-LABEL: test_llwpcb: 15; BDVER: # %bb.0: 16; BDVER-NEXT: llwpcb %rdi 17; BDVER-NEXT: retq 18 tail call void @llvm.x86.llwpcb(i8 *%a0) 19 ret void 20} 21 22define i8* @test_slwpcb(i8 *%a0) nounwind { 23; GENERIC-LABEL: test_slwpcb: 24; GENERIC: # %bb.0: 25; GENERIC-NEXT: slwpcb %rax # sched: [100:0.33] 26; GENERIC-NEXT: retq # sched: [1:1.00] 27; 28; BDVER-LABEL: test_slwpcb: 29; BDVER: # %bb.0: 30; BDVER-NEXT: slwpcb %rax 31; BDVER-NEXT: retq 32 %1 = tail call i8* @llvm.x86.slwpcb() 33 ret i8 *%1 34} 35 36define i8 @test_lwpins32_rri(i32 %a0, i32 %a1) nounwind { 37; GENERIC-LABEL: test_lwpins32_rri: 38; GENERIC: # %bb.0: 39; GENERIC-NEXT: addl %esi, %esi # sched: [1:0.33] 40; GENERIC-NEXT: lwpins $-1985229329, %esi, %edi # imm = 0x89ABCDEF 41; GENERIC-NEXT: # sched: [100:0.33] 42; GENERIC-NEXT: setb %al # sched: [1:0.50] 43; GENERIC-NEXT: retq # sched: [1:1.00] 44; 45; BDVER-LABEL: test_lwpins32_rri: 46; BDVER: # %bb.0: 47; BDVER-NEXT: addl %esi, %esi 48; BDVER-NEXT: lwpins $-1985229329, %esi, %edi # imm = 0x89ABCDEF 49; BDVER-NEXT: setb %al 50; BDVER-NEXT: retq 51 %1 = add i32 %a1, %a1 52 %2 = tail call i8 @llvm.x86.lwpins32(i32 %a0, i32 %1, i32 2309737967) 53 ret i8 %2 54} 55 56define i8 @test_lwpins32_rmi(i32 %a0, i32 *%p1) nounwind { 57; GENERIC-LABEL: test_lwpins32_rmi: 58; GENERIC: # %bb.0: 59; GENERIC-NEXT: lwpins $1985229328, (%rsi), %edi # imm = 0x76543210 60; GENERIC-NEXT: # sched: [100:0.33] 61; GENERIC-NEXT: setb %al # sched: [1:0.50] 62; GENERIC-NEXT: retq # sched: [1:1.00] 63; 64; BDVER-LABEL: test_lwpins32_rmi: 65; BDVER: # %bb.0: 66; BDVER-NEXT: lwpins $1985229328, (%rsi), %edi # imm = 0x76543210 67; BDVER-NEXT: setb %al 68; BDVER-NEXT: retq 69 %a1 = load i32, i32 *%p1 70 %1 = tail call i8 @llvm.x86.lwpins32(i32 %a0, i32 %a1, i32 1985229328) 71 ret i8 %1 72} 73 74define i8 @test_lwpins64_rri(i64 %a0, i32 %a1) nounwind { 75; GENERIC-LABEL: test_lwpins64_rri: 76; GENERIC: # %bb.0: 77; GENERIC-NEXT: lwpins $-1985229329, %esi, %rdi # imm = 0x89ABCDEF 78; GENERIC-NEXT: # sched: [100:0.33] 79; GENERIC-NEXT: setb %al # sched: [1:0.50] 80; GENERIC-NEXT: retq # sched: [1:1.00] 81; 82; BDVER-LABEL: test_lwpins64_rri: 83; BDVER: # %bb.0: 84; BDVER-NEXT: lwpins $-1985229329, %esi, %rdi # imm = 0x89ABCDEF 85; BDVER-NEXT: setb %al 86; BDVER-NEXT: retq 87 %1 = tail call i8 @llvm.x86.lwpins64(i64 %a0, i32 %a1, i32 2309737967) 88 ret i8 %1 89} 90 91define i8 @test_lwpins64_rmi(i64 %a0, i32 *%p1) nounwind { 92; GENERIC-LABEL: test_lwpins64_rmi: 93; GENERIC: # %bb.0: 94; GENERIC-NEXT: lwpins $1985229328, (%rsi), %rdi # imm = 0x76543210 95; GENERIC-NEXT: # sched: [100:0.33] 96; GENERIC-NEXT: setb %al # sched: [1:0.50] 97; GENERIC-NEXT: retq # sched: [1:1.00] 98; 99; BDVER-LABEL: test_lwpins64_rmi: 100; BDVER: # %bb.0: 101; BDVER-NEXT: lwpins $1985229328, (%rsi), %rdi # imm = 0x76543210 102; BDVER-NEXT: setb %al 103; BDVER-NEXT: retq 104 %a1 = load i32, i32 *%p1 105 %1 = tail call i8 @llvm.x86.lwpins64(i64 %a0, i32 %a1, i32 1985229328) 106 ret i8 %1 107} 108 109define void @test_lwpval32_rri(i32 %a0, i32 %a1) nounwind { 110; GENERIC-LABEL: test_lwpval32_rri: 111; GENERIC: # %bb.0: 112; GENERIC-NEXT: addl %esi, %esi # sched: [1:0.33] 113; GENERIC-NEXT: lwpval $-19088744, %esi, %edi # imm = 0xFEDCBA98 114; GENERIC-NEXT: # sched: [100:0.33] 115; GENERIC-NEXT: retq # sched: [1:1.00] 116; 117; BDVER-LABEL: test_lwpval32_rri: 118; BDVER: # %bb.0: 119; BDVER-NEXT: addl %esi, %esi 120; BDVER-NEXT: lwpval $-19088744, %esi, %edi # imm = 0xFEDCBA98 121; BDVER-NEXT: retq 122 %1 = add i32 %a1, %a1 123 tail call void @llvm.x86.lwpval32(i32 %a0, i32 %1, i32 4275878552) 124 ret void 125} 126 127define void @test_lwpval32_rmi(i32 %a0, i32 *%p1) nounwind { 128; GENERIC-LABEL: test_lwpval32_rmi: 129; GENERIC: # %bb.0: 130; GENERIC-NEXT: lwpval $305419896, (%rsi), %edi # imm = 0x12345678 131; GENERIC-NEXT: # sched: [100:0.33] 132; GENERIC-NEXT: retq # sched: [1:1.00] 133; 134; BDVER-LABEL: test_lwpval32_rmi: 135; BDVER: # %bb.0: 136; BDVER-NEXT: lwpval $305419896, (%rsi), %edi # imm = 0x12345678 137; BDVER-NEXT: retq 138 %a1 = load i32, i32 *%p1 139 tail call void @llvm.x86.lwpval32(i32 %a0, i32 %a1, i32 305419896) 140 ret void 141} 142 143define void @test_lwpval64_rri(i64 %a0, i32 %a1) nounwind { 144; GENERIC-LABEL: test_lwpval64_rri: 145; GENERIC: # %bb.0: 146; GENERIC-NEXT: lwpval $-19088744, %esi, %rdi # imm = 0xFEDCBA98 147; GENERIC-NEXT: # sched: [100:0.33] 148; GENERIC-NEXT: retq # sched: [1:1.00] 149; 150; BDVER-LABEL: test_lwpval64_rri: 151; BDVER: # %bb.0: 152; BDVER-NEXT: lwpval $-19088744, %esi, %rdi # imm = 0xFEDCBA98 153; BDVER-NEXT: retq 154 tail call void @llvm.x86.lwpval64(i64 %a0, i32 %a1, i32 4275878552) 155 ret void 156} 157 158define void @test_lwpval64_rmi(i64 %a0, i32 *%p1) nounwind { 159; GENERIC-LABEL: test_lwpval64_rmi: 160; GENERIC: # %bb.0: 161; GENERIC-NEXT: lwpval $305419896, (%rsi), %rdi # imm = 0x12345678 162; GENERIC-NEXT: # sched: [100:0.33] 163; GENERIC-NEXT: retq # sched: [1:1.00] 164; 165; BDVER-LABEL: test_lwpval64_rmi: 166; BDVER: # %bb.0: 167; BDVER-NEXT: lwpval $305419896, (%rsi), %rdi # imm = 0x12345678 168; BDVER-NEXT: retq 169 %a1 = load i32, i32 *%p1 170 tail call void @llvm.x86.lwpval64(i64 %a0, i32 %a1, i32 305419896) 171 ret void 172} 173 174declare void @llvm.x86.llwpcb(i8*) nounwind 175declare i8* @llvm.x86.slwpcb() nounwind 176declare i8 @llvm.x86.lwpins32(i32, i32, i32) nounwind 177declare i8 @llvm.x86.lwpins64(i64, i32, i32) nounwind 178declare void @llvm.x86.lwpval32(i32, i32, i32) nounwind 179declare void @llvm.x86.lwpval64(i64, i32, i32) nounwind 180