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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Davx512cdvl-intrinsics-upgrade.ll5 declare <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32>, <4 x i32>, i8)
28 %res = call <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32> %x0, <4 x i32> %x1, i8 %x2)
29 %res1 = call <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32> %x0, <4 x i32> %x1, i8 -1)
30 …%res3 = call <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32> %x0, <4 x i32> zeroinitializer,…
36 declare <8 x i32> @llvm.x86.avx512.mask.lzcnt.d.256(<8 x i32>, <8 x i32>, i8)
55 %res = call <8 x i32> @llvm.x86.avx512.mask.lzcnt.d.256(<8 x i32> %x0, <8 x i32> %x1, i8 %x2)
56 %res1 = call <8 x i32> @llvm.x86.avx512.mask.lzcnt.d.256(<8 x i32> %x0, <8 x i32> %x1, i8 -1)
61 declare <2 x i64> @llvm.x86.avx512.mask.lzcnt.q.128(<2 x i64>, <2 x i64>, i8)
80 %res = call <2 x i64> @llvm.x86.avx512.mask.lzcnt.q.128(<2 x i64> %x0, <2 x i64> %x1, i8 %x2)
81 %res1 = call <2 x i64> @llvm.x86.avx512.mask.lzcnt.q.128(<2 x i64> %x0, <2 x i64> %x1, i8 -1)
[all …]
Davx512cd-intrinsics-upgrade.ll10 …%res = call <16 x i32> @llvm.x86.avx512.mask.lzcnt.d.512(<16 x i32> %a, <16 x i32> zeroinitializer…
14 declare <16 x i32> @llvm.x86.avx512.mask.lzcnt.d.512(<16 x i32>, <16 x i32>, i16) nounwind readonly
21 …%res = call <8 x i64> @llvm.x86.avx512.mask.lzcnt.q.512(<8 x i64> %a, <8 x i64> zeroinitializer, i…
25 declare <8 x i64> @llvm.x86.avx512.mask.lzcnt.q.512(<8 x i64>, <8 x i64>, i8) nounwind readonly
42 %res = call <16 x i32> @llvm.x86.avx512.mask.lzcnt.d.512(<16 x i32> %a, <16 x i32> %b, i16 %mask)
61 %res = call <8 x i64> @llvm.x86.avx512.mask.lzcnt.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask)
Dlzcnt-zext-cmp.ll2 ; Test patterns which generates lzcnt instructions.
3 ; Eg: zext(or(setcc(cmp), setcc(cmp))) -> shr(or(lzcnt, lzcnt))
5 ; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=btver2 -mattr=-fast-lzcnt | FileCheck --check-prefix…
7 ; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=znver1 -mattr=-fast-lzcnt | FileCheck --check-prefix…
Dpr35399.ll2 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=lzcnt | FileCheck %s
Dms-inline-asm-avx512.ll23 …,+avx512vl,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+mpx,+…
Dlzcnt.ll1 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+lzcnt | FileCheck %s
Dbitcnt-false-dep.ll4 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=silvermont -mattr=+lzcnt,+bmi | FileCheck %…
5 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=goldmont -mattr=+lzcnt,+bmi | FileCheck %s …
/external/llvm/test/CodeGen/X86/
Dlzcnt-tzcnt.ll1 ; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+bmi,+lzcnt | FileCheck %s
16 ; CHECK: lzcnt
27 ; CHECK: lzcnt
38 ; CHECK: lzcnt
49 ; CHECK: lzcnt
60 ; CHECK: lzcnt
71 ; CHECK: lzcnt
84 ; CHECK: lzcnt
97 ; CHECK: lzcnt
110 ; CHECK: lzcnt
[all …]
Davx512cdvl-intrinsics.ll6 declare <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32>, <4 x i32>, i8)
18 %res = call <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32> %x0, <4 x i32> %x1, i8 %x2)
19 %res1 = call <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32> %x0, <4 x i32> %x1, i8 -1)
20 …%res3 = call <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32> %x0, <4 x i32> zeroinitializer,…
26 declare <8 x i32> @llvm.x86.avx512.mask.lzcnt.d.256(<8 x i32>, <8 x i32>, i8)
36 %res = call <8 x i32> @llvm.x86.avx512.mask.lzcnt.d.256(<8 x i32> %x0, <8 x i32> %x1, i8 %x2)
37 %res1 = call <8 x i32> @llvm.x86.avx512.mask.lzcnt.d.256(<8 x i32> %x0, <8 x i32> %x1, i8 -1)
42 declare <2 x i64> @llvm.x86.avx512.mask.lzcnt.q.128(<2 x i64>, <2 x i64>, i8)
52 %res = call <2 x i64> @llvm.x86.avx512.mask.lzcnt.q.128(<2 x i64> %x0, <2 x i64> %x1, i8 %x2)
53 %res1 = call <2 x i64> @llvm.x86.avx512.mask.lzcnt.q.128(<2 x i64> %x0, <2 x i64> %x1, i8 -1)
[all …]
Dlzcnt.ll1 ; RUN: llc < %s -march=x86-64 -mattr=+lzcnt | FileCheck %s
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/BtVer2/
Dpartial-reg-update-6.s5 # Each lzcnt has a false dependency on %ecx; the first lzcnt has to wait on the
7 # The last lzcnt has a false dependency on %cx. However, even in this case, the
11 lzcnt (%rsp), %cx label
12 lzcnt 2(%rsp), %cx label
Dpartial-reg-update-4.s6 # The lzcnt cannot execute in parallel with the imul because there is a false
10 lzcnt %ax, %bx label
Dclear-super-register-1.s9 lzcnt %ecx, %eax label
Dpartial-reg-update-2.s5 lzcnt %ax, %bx label
Dpartial-reg-update-5.s6 lzcnt %ax, %bx ## partial register stall. label
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/Znver1/
Dpartial-reg-update-6.s4 # Each lzcnt has a false dependency on %ecx; the first lzcnt has to wait on the
6 # The last lzcnt has a false dependency on %cx. However, even in this case, the
10 lzcnt (%rsp), %cx label
11 lzcnt 2(%rsp), %cx label
Dpartial-reg-update-4.s4 # The lzcnt cannot execute in parallel with the imul because there is a false
8 lzcnt %ax, %bx label
Dpartial-reg-update-2.s5 lzcnt %ax, %bx label
Dpartial-reg-update-5.s4 lzcnt %ax, %bx ## partial register stall. label
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dlzcnt.ll1 ; RUN: llc < %s -march=x86-64 -mattr=+lzcnt | FileCheck %s
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/X86/
Dint128_no_gather.ll74 …,+avx512vl,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+mpx,+…
75 …,+avx512vl,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+mpx,+…
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/
Dvector_gep.ll23 …+avx512er,+avx512f,+avx512pf,+bmi,+bmi2,+cx16,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+pclmu…
/external/llvm/test/Transforms/SLPVectorizer/X86/
Dvector_gep.ll23 …+avx512er,+avx512f,+avx512pf,+bmi,+bmi2,+cx16,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+pclmu…
/external/llvm/test/Transforms/CodeGenPrepare/X86/
Dcttz-ctlz.ll3 ; RUN: opt -S -codegenprepare -mattr=+lzcnt < %s | FileCheck %s --check-prefix=FAST_LZ
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/CodeGenPrepare/X86/
Dcttz-ctlz.ll3 ; RUN: opt -S -codegenprepare -mattr=+lzcnt < %s | FileCheck %s --check-prefix=FAST_LZ

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