1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X86 3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X64 4 5define <16 x i32> @test_lzcnt_d(<16 x i32> %a) { 6; CHECK-LABEL: test_lzcnt_d: 7; CHECK: # %bb.0: 8; CHECK-NEXT: vplzcntd %zmm0, %zmm0 9; CHECK-NEXT: ret{{[l|q]}} 10 %res = call <16 x i32> @llvm.x86.avx512.mask.lzcnt.d.512(<16 x i32> %a, <16 x i32> zeroinitializer, i16 -1) 11 ret <16 x i32> %res 12} 13 14declare <16 x i32> @llvm.x86.avx512.mask.lzcnt.d.512(<16 x i32>, <16 x i32>, i16) nounwind readonly 15 16define <8 x i64> @test_lzcnt_q(<8 x i64> %a) { 17; CHECK-LABEL: test_lzcnt_q: 18; CHECK: # %bb.0: 19; CHECK-NEXT: vplzcntq %zmm0, %zmm0 20; CHECK-NEXT: ret{{[l|q]}} 21 %res = call <8 x i64> @llvm.x86.avx512.mask.lzcnt.q.512(<8 x i64> %a, <8 x i64> zeroinitializer, i8 -1) 22 ret <8 x i64> %res 23} 24 25declare <8 x i64> @llvm.x86.avx512.mask.lzcnt.q.512(<8 x i64>, <8 x i64>, i8) nounwind readonly 26 27 28define <16 x i32> @test_mask_lzcnt_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) { 29; X86-LABEL: test_mask_lzcnt_d: 30; X86: # %bb.0: 31; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 32; X86-NEXT: vplzcntd %zmm0, %zmm1 {%k1} 33; X86-NEXT: vmovdqa64 %zmm1, %zmm0 34; X86-NEXT: retl 35; 36; X64-LABEL: test_mask_lzcnt_d: 37; X64: # %bb.0: 38; X64-NEXT: kmovw %edi, %k1 39; X64-NEXT: vplzcntd %zmm0, %zmm1 {%k1} 40; X64-NEXT: vmovdqa64 %zmm1, %zmm0 41; X64-NEXT: retq 42 %res = call <16 x i32> @llvm.x86.avx512.mask.lzcnt.d.512(<16 x i32> %a, <16 x i32> %b, i16 %mask) 43 ret <16 x i32> %res 44} 45 46define <8 x i64> @test_mask_lzcnt_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) { 47; X86-LABEL: test_mask_lzcnt_q: 48; X86: # %bb.0: 49; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax 50; X86-NEXT: kmovw %eax, %k1 51; X86-NEXT: vplzcntq %zmm0, %zmm1 {%k1} 52; X86-NEXT: vmovdqa64 %zmm1, %zmm0 53; X86-NEXT: retl 54; 55; X64-LABEL: test_mask_lzcnt_q: 56; X64: # %bb.0: 57; X64-NEXT: kmovw %edi, %k1 58; X64-NEXT: vplzcntq %zmm0, %zmm1 {%k1} 59; X64-NEXT: vmovdqa64 %zmm1, %zmm0 60; X64-NEXT: retq 61 %res = call <8 x i64> @llvm.x86.avx512.mask.lzcnt.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask) 62 ret <8 x i64> %res 63} 64 65define <16 x i32> @test_x86_vbroadcastmw_512(i16 %a0) { 66; X86-LABEL: test_x86_vbroadcastmw_512: 67; X86: # %bb.0: 68; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax 69; X86-NEXT: vpbroadcastd %eax, %zmm0 70; X86-NEXT: retl 71; 72; X64-LABEL: test_x86_vbroadcastmw_512: 73; X64: # %bb.0: 74; X64-NEXT: movzwl %di, %eax 75; X64-NEXT: vpbroadcastd %eax, %zmm0 76; X64-NEXT: retq 77 %res = call <16 x i32> @llvm.x86.avx512.broadcastmw.512(i16 %a0) 78 ret <16 x i32> %res 79} 80declare <16 x i32> @llvm.x86.avx512.broadcastmw.512(i16) 81 82define <8 x i64> @test_x86_broadcastmb_512(i8 %a0) { 83; X86-LABEL: test_x86_broadcastmb_512: 84; X86: # %bb.0: 85; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax 86; X86-NEXT: vmovd %eax, %xmm0 87; X86-NEXT: vpbroadcastq %xmm0, %zmm0 88; X86-NEXT: retl 89; 90; X64-LABEL: test_x86_broadcastmb_512: 91; X64: # %bb.0: 92; X64-NEXT: # kill: def $edi killed $edi def $rdi 93; X64-NEXT: movzbl %dil, %eax 94; X64-NEXT: vpbroadcastq %rax, %zmm0 95; X64-NEXT: retq 96 %res = call <8 x i64> @llvm.x86.avx512.broadcastmb.512(i8 %a0) 97 ret <8 x i64> %res 98} 99declare <8 x i64> @llvm.x86.avx512.broadcastmb.512(i8) 100 101