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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.image.dim.ll71 define amdgpu_ps <4 x float> @load_mip_1d(<8 x i32> inreg %rsrc, i32 %s, i32 %mip) {
73 …%v = call <4 x float> @llvm.amdgcn.image.load.mip.1d.v4f32.i32(i32 15, i32 %s, i32 %mip, <8 x i32>…
79 define amdgpu_ps <4 x float> @load_mip_2d(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %mip) {
81 …%v = call <4 x float> @llvm.amdgcn.image.load.mip.2d.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %mip, <…
87 define amdgpu_ps <4 x float> @load_mip_3d(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %r, i32 %mip) {
89 …%v = call <4 x float> @llvm.amdgcn.image.load.mip.3d.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %r, i32…
95 …amdgpu_ps <4 x float> @load_mip_cube(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %slice, i32 %mip) {
97 …v = call <4 x float> @llvm.amdgcn.image.load.mip.cube.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %slice…
103 define amdgpu_ps <4 x float> @load_mip_1darray(<8 x i32> inreg %rsrc, i32 %s, i32 %slice, i32 %mip)…
105 …%v = call <4 x float> @llvm.amdgcn.image.load.mip.1darray.v4f32.i32(i32 15, i32 %s, i32 %slice, i3…
[all …]
Dllvm.amdgcn.image.d16.dim.ll36 define amdgpu_ps <2 x float> @image_load_mip_v4f16(<8 x i32> inreg %rsrc, i32 %s, i32 %t, i32 %mip)…
38 …%tex = call <4 x half> @llvm.amdgcn.image.load.mip.2d.v4f16.i32(i32 15, i32 %s, i32 %t, i32 %mip, …
94 define amdgpu_ps void @image_store_mip_1d_v4f16(<8 x i32> inreg %rsrc, i32 %s, i32 %mip, <2 x float…
97 …call void @llvm.amdgcn.image.store.mip.1d.v4f16.i32(<4 x half> %data, i32 15, i32 %s, i32 %mip, <8…
104 declare <4 x half> @llvm.amdgcn.image.load.mip.2d.v4f16.i32(i32, i32, i32, i32, <8 x i32>, i32, i32…
110 declare void @llvm.amdgcn.image.store.mip.1d.v4f16.i32(<4 x half>, i32, i32, i32, <8 x i32>, i32, i…
/external/blktrace/
Dblktrace.c597 static void init_mmap_info(struct mmap_info *mip) in init_mmap_info() argument
599 mip->buf_size = buf_size; in init_mmap_info()
600 mip->buf_nr = buf_nr; in init_mmap_info()
601 mip->pagesize = pagesize; in init_mmap_info()
749 struct mmap_info *mip, in setup_mmap() argument
752 if (mip->fs_off + maxlen > mip->fs_buf_len) { in setup_mmap()
753 unsigned long nr = max(16, mip->buf_nr); in setup_mmap()
755 if (mip->fs_buf) { in setup_mmap()
756 munlock(mip->fs_buf, mip->fs_buf_len); in setup_mmap()
757 munmap(mip->fs_buf, mip->fs_buf_len); in setup_mmap()
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/external/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_resource.c157 struct etna_resource_level *mip = &rsc->levels[level]; in setup_miptree() local
159 mip->width = width; in setup_miptree()
160 mip->height = height; in setup_miptree()
161 mip->padded_width = align(width * msaa_xscale, paddingX); in setup_miptree()
162 mip->padded_height = align(height * msaa_yscale, paddingY); in setup_miptree()
163 mip->stride = util_format_get_stride(prsc->format, mip->padded_width); in setup_miptree()
164 mip->offset = size; in setup_miptree()
165 mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height); in setup_miptree()
166 mip->size = prsc->array_size * mip->layer_stride; in setup_miptree()
169 size += align(mip->size, ETNA_PE_ALIGNMENT) * depth; in setup_miptree()
/external/libvpx/libvpx/vp8/common/
Dalloccommon.c41 vpx_free(oci->mip); in vp8_de_alloc_frame_buffers()
48 oci->mip = NULL; in vp8_de_alloc_frame_buffers()
89 oci->mip = in vp8_alloc_frame_buffers()
92 if (!oci->mip) goto allocation_fail; in vp8_alloc_frame_buffers()
94 oci->mi = oci->mip + oci->mode_info_stride + 1; in vp8_alloc_frame_buffers()
Donyxc_int.h120 MODE_INFO *mip; /* Base of allocated array */ member
/external/libvpx/libvpx/vp9/common/
Dvp9_loopfilter.c887 MODE_INFO **mip = mi8x8; in vp9_setup_mask() local
917 assert(mip[0] != NULL); in vp9_setup_mask()
919 switch (mip[0]->sb_type) { in vp9_setup_mask()
920 case BLOCK_64X64: build_masks(lfi_n, mip[0], 0, 0, lfm); break; in vp9_setup_mask()
922 build_masks(lfi_n, mip[0], 0, 0, lfm); in vp9_setup_mask()
923 mip2 = mip + mode_info_stride * 4; in vp9_setup_mask()
928 build_masks(lfi_n, mip[0], 0, 0, lfm); in vp9_setup_mask()
929 mip2 = mip + 4; in vp9_setup_mask()
934 for (idx_32 = 0; idx_32 < 4; mip += offset_32[idx_32], ++idx_32) { in vp9_setup_mask()
941 switch (mip[0]->sb_type) { in vp9_setup_mask()
[all …]
Dvp9_postproc.c287 cm->postproc_state.prev_mip = cm->mip; in swap_mi_and_prev_mi()
288 cm->mip = temp; in swap_mi_and_prev_mi()
291 cm->mi = cm->mip + cm->mi_stride + 1; in swap_mi_and_prev_mi()
318 ppstate->prev_mip = vpx_calloc(cm->mi_alloc_size, sizeof(*cm->mip)); in vp9_post_proc_frame()
/external/openssh/
Dmatch.c200 int mhost, mip; in match_host_and_ip() local
202 if ((mip = addr_match_list(ipaddr, patterns)) == -2) in match_host_and_ip()
204 else if (host == NULL || ipaddr == NULL || mip == -1) in match_host_and_ip()
211 if (mhost == 0 && mip == 0) in match_host_and_ip()
/external/mesa3d/src/gallium/drivers/svga/include/
Dsvga3d_surfacedefs.h1050 uint32 mip) in svga3dsurface_get_image_offset() argument
1069 if (i < mip) { in svga3dsurface_get_image_offset()
1088 uint32 mip; in svga3dsurface_get_serialized_size() local
1090 for (mip = 0; mip < num_mip_levels; mip++) { in svga3dsurface_get_serialized_size()
1092 svga3dsurface_get_mip_size(base_level_size, mip); in svga3dsurface_get_serialized_size()
/external/deqp-deps/glslang/Test/
Dhlsl.mip.operator.frag8 // test float->uint cast on the mip arg
12 // ....outer operator mip level...... .....outer operator coordinate....
/external/libvpx/libvpx/vp9/decoder/
Dvp9_decoder.c52 cm->mi = cm->mip + cm->mi_stride + 1; in vp9_dec_setup_mi()
96 cm->mip = vpx_calloc(mi_size, sizeof(*cm->mip)); in vp9_dec_alloc_mi()
97 if (!cm->mip) return 1; in vp9_dec_alloc_mi()
105 vpx_free(cm->mip); in vp9_dec_free_mi()
106 cm->mip = NULL; in vp9_dec_free_mi()
/external/mesa3d/src/gallium/drivers/nouveau/nv50/
Dnv84_video.c272 struct nv50_miptree mip; in nv84_create_decoder() local
479 surf.base.texture = &mip.base.base; in nv84_create_decoder()
480 mip.level[0].tile_mode = 0; in nv84_create_decoder()
481 mip.level[0].pitch = surf.width * 4; in nv84_create_decoder()
482 mip.base.domain = NOUVEAU_BO_VRAM; in nv84_create_decoder()
483 mip.base.bo = dec->mbring; in nv84_create_decoder()
484 mip.base.address = dec->mbring->offset; in nv84_create_decoder()
489 mip.level[0].pitch = surf.width * 4; in nv84_create_decoder()
490 mip.base.bo = dec->vpring; in nv84_create_decoder()
491 mip.base.address = dec->vpring->offset; in nv84_create_decoder()
/external/libaom/libaom/av1/decoder/
Ddecoder.c49 cm->mi = cm->mip; in dec_setup_mi()
56 cm->mip = aom_calloc(mi_size, sizeof(*cm->mip)); in av1_dec_alloc_mi()
57 if (!cm->mip) return 1; in av1_dec_alloc_mi()
66 aom_free(cm->mip); in dec_free_mi()
67 cm->mip = NULL; in dec_free_mi()
/external/mesa3d/src/gallium/drivers/r300/
Dr300_state_inlines.h262 static inline uint32_t r300_translate_tex_filters(int min, int mag, int mip, in r300_translate_tex_filters() argument
293 switch (mip) { in r300_translate_tex_filters()
304 fprintf(stderr, "r300: Unknown texture filter %d\n", mip); in r300_translate_tex_filters()
/external/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.image.ll36 …%tex = call <4 x float> @llvm.amdgcn.image.load.mip.v4i32(<4 x i32> %c, <8 x i32> %rsrc, i32 15, i…
79 …call void @llvm.amdgcn.image.store.mip.v4i32(<4 x float> %data, <4 x i32> %coords, <8 x i32> %rsrc…
102 declare void @llvm.amdgcn.image.store.mip.v4i32(<4 x float>, <4 x i32>, <8 x i32>, i32, i1, i1, i1,…
107 declare <4 x float> @llvm.amdgcn.image.load.mip.v4i32(<4 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #1
Dllvm.SI.image.ll21 …%r = call <4 x float> @llvm.SI.image.load.mip.v4i32(<4 x i32> undef, <8 x i32> undef, i32 15, i32 …
44 declare <4 x float> @llvm.SI.image.load.mip.v4i32(<4 x i32>, <8 x i32>, i32, i32, i32, i32, i32, i3…
/external/mesa3d/src/amd/addrlib/gfx9/
Dgfx9addrlib.cpp456 for (UINT_32 mip = 0; mip < numMipLevels; mip++) in GetMetaMipInfo() local
460 GetMetaMiptailInfo(&pInfo[mip], mipCoord, numMipLevels - mip, in GetMetaMipInfo()
470 pInfo[mip].inMiptail = FALSE; in GetMetaMipInfo()
471 pInfo[mip].startX = mipCoord.w; in GetMetaMipInfo()
472 pInfo[mip].startY = mipCoord.h; in GetMetaMipInfo()
473 pInfo[mip].startZ = mipCoord.d; in GetMetaMipInfo()
474 pInfo[mip].width = mipWidth; in GetMetaMipInfo()
475 pInfo[mip].height = mipHeight; in GetMetaMipInfo()
476 pInfo[mip].depth = dataThick ? mipDepth : 1; in GetMetaMipInfo()
478 if ((mip >= 3) || (mip & 1)) in GetMetaMipInfo()
[all …]
/external/mesa3d/src/intel/vulkan/
DgenX_cmd_buffer.c455 anv_batch_emit(&cmd_buffer->batch, GENX(MI_PREDICATE), mip) { in genX()
456 mip.LoadOperation = LOAD_LOADINV; in genX()
457 mip.CombineOperation = COMBINE_SET; in genX()
458 mip.CompareOperation = COMPARE_SRCS_EQUAL; in genX()
2751 anv_batch_emit(batch, GENX(MI_PREDICATE), mip) { in genX()
2752 mip.LoadOperation = LOAD_LOAD; in genX()
2753 mip.CombineOperation = COMBINE_SET; in genX()
2754 mip.CompareOperation = COMPARE_SRCS_EQUAL; in genX()
2761 anv_batch_emit(batch, GENX(MI_PREDICATE), mip) { in genX()
2762 mip.LoadOperation = LOAD_LOAD; in genX()
[all …]
/external/deqp/doc/testspecs/VK/
Dsparse_resources.txt13 5. Test partially resident image with mipmaps, put some mipmap levels in mip tail region
98 5. Test partially resident image with mipmaps, put some mipmap levels in mip tail region
101 …ceives a separate device memory binding. The mipmaps levels that end up in mip tail region receive…
133 both images. The mipmap levels that land in the mip tail region have separate memory regions for bo…
138 WRITE image should be overwritten by this operation, the mip tail region should be left intact. Nex…
141 …compute shader. On the other hand for each mipmap level that landed in the mip tail region, the da…
/external/sonivox/arm-wt-22k/lib_src/
Deas_voicemgt.c675 pSynth->channels[i].mip = 0; in VMInitMIPTable()
686 …MSetMIPEntry (S_VOICE_MGR *pVoiceMgr, S_SYNTH *pSynth, EAS_U8 channel, EAS_U8 priority, EAS_U8 mip) in VMSetMIPEntry() argument
697 pSynth->channels[channel].mip = mip; in VMSetMIPEntry()
732 if ((pSynth->channels[i].mip != 0) && (pSynth->channels[i].mip <= maxPolyphony)) in VMMIPUpdateChannelMuting()
838 if (pChannel->mip == currentMIP && currentPool != -1) in VMUpdateMIPTable()
845 pSynth->poolAlloc[currentPool] = (EAS_U8) (pChannel->mip - currentMIP); in VMUpdateMIPTable()
846 currentMIP = pChannel->mip; in VMUpdateMIPTable()
Deas_synth.h230 EAS_U8 mip; /* SPMIDI MIP setting */ member
/external/deqp-deps/glslang/Test/baseResults/
Dhlsl.mip.negative.frag.out1 hlsl.mip.negative.frag
Dhlsl.mip.negative2.frag.out1 hlsl.mip.negative2.frag
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DMIMGInstructions.td164 multiclass MIMG_NoSampler <bits<7> op, string asm, bit has_d16, bit mip = 0,
168 let LodOrClampOrMip = mip;
222 multiclass MIMG_Store <bits<7> op, string asm, bit has_d16, bit mip = 0> {
225 let LodOrClampOrMip = mip;

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