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Searched refs:nir_op_infos (Results 1 – 25 of 32) sorted by relevance

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/external/mesa3d/src/compiler/nir/
Dnir_search.c64 nir_alu_type output_type = nir_op_infos[src_alu->op].output_type; in src_is_type()
114 if (nir_op_infos[instr->op].input_sizes[src] != 0) { in match_value()
115 num_components = nir_op_infos[instr->op].input_sizes[src]; in match_value()
268 assert(nir_op_infos[instr->op].num_inputs > 0); in match_expression()
276 if (nir_op_infos[instr->op].output_size != 0) { in match_expression()
289 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in match_expression()
300 if (nir_op_infos[instr->op].algebraic_properties & NIR_OP_IS_COMMUTATIVE) { in match_expression()
301 assert(nir_op_infos[instr->op].num_inputs == 2); in match_expression()
341 nir_op_info info = nir_op_infos[expr->opcode]; in build_bitsize_tree()
448 if (nir_op_infos[expr->opcode].output_size != 0) in construct_value()
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Dnir_lower_vec_to_movs.c58 assert(start_idx < nir_op_infos[vec->op].num_inputs); in insert_mov()
123 assert(start_idx < nir_op_infos[vec->op].num_inputs); in try_coalesce()
163 if (nir_op_infos[src_alu->op].output_size != 0) in try_coalesce()
169 for (unsigned j = 0; j < nir_op_infos[src_alu->op].num_inputs; j++) in try_coalesce()
170 if (nir_op_infos[src_alu->op].input_sizes[j] != 0) in try_coalesce()
176 for (unsigned j = 0; j < nir_op_infos[src_alu->op].num_inputs; j++) in try_coalesce()
198 for (unsigned j = 0; j < nir_op_infos[src_alu->op].num_inputs; j++) in try_coalesce()
Dnir_lower_alu_to_scalar.c46 unsigned num_components = nir_op_infos[instr->op].input_sizes[0]; in lower_reduction()
54 if (nir_op_infos[chan_op].num_inputs > 1) { in lower_reduction()
55 assert(nir_op_infos[chan_op].num_inputs == 2); in lower_reduction()
79 unsigned num_src = nir_op_infos[instr->op].num_inputs; in lower_alu_instr_scalar()
221 assert(nir_op_infos[instr->op].input_sizes[i] < 2); in lower_alu_instr_scalar()
222 unsigned src_chan = (nir_op_infos[instr->op].input_sizes[i] == 1 ? in lower_alu_instr_scalar()
Dnir_move_vec_src_uses_to_dest.c96 for (unsigned i = 0; i < nir_op_infos[vec->op].num_inputs; i++) { in move_vec_src_uses_to_dest_block()
115 for (unsigned j = i; j < nir_op_infos[vec->op].num_inputs; j++) { in move_vec_src_uses_to_dest_block()
145 assert(src_idx < nir_op_infos[use_alu->op].num_inputs); in move_vec_src_uses_to_dest_block()
Dnir_search_helpers.h49 switch (nir_op_infos[instr->op].input_types[src]) { in is_pos_power_of_two()
79 switch (nir_op_infos[instr->op].input_types[src]) { in is_neg_power_of_two()
104 switch (nir_op_infos[instr->op].input_types[src]) { in is_zero_to_one()
Dnir_lower_to_source_mods.c47 for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { in nir_lower_to_source_mods_block()
59 switch (nir_alu_type_get_base_type(nir_op_infos[alu->op].input_types[i])) { in nir_lower_to_source_mods_block()
135 if (nir_alu_type_get_base_type(nir_op_infos[alu->op].output_type) != in nir_lower_to_source_mods_block()
Dnir_lower_regs_to_ssa.c135 if (nir_op_infos[alu->op].output_size == 0) { in rewrite_alu_instr()
148 for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { in rewrite_alu_instr()
149 if (nir_op_infos[alu->op].input_sizes[i] != 0) in rewrite_alu_instr()
172 num_components = nir_op_infos[alu->op].output_size; in rewrite_alu_instr()
Dnir_opt_constant_folding.c59 if (!nir_alu_type_get_type_size(nir_op_infos[instr->op].output_type)) in constant_fold_alu_instr()
62 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in constant_fold_alu_instr()
67 !nir_alu_type_get_type_size(nir_op_infos[instr->op].input_sizes[i])) { in constant_fold_alu_instr()
Dnir_instr_set.c58 if (nir_op_infos[instr->op].algebraic_properties & NIR_OP_IS_COMMUTATIVE) { in hash_alu()
59 assert(nir_op_infos[instr->op].num_inputs == 2); in hash_alu()
72 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in hash_alu()
278 if (nir_op_infos[alu1->op].algebraic_properties & NIR_OP_IS_COMMUTATIVE) { in nir_instrs_equal()
279 assert(nir_op_infos[alu1->op].num_inputs == 2); in nir_instrs_equal()
285 for (unsigned i = 0; i < nir_op_infos[alu1->op].num_inputs; i++) { in nir_instrs_equal()
Dnir_loop_analyze.c168 for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { in mark_invariant()
245 if (nir_op_infos[alu->op].num_inputs == 2) { in compute_induction_information()
405 assert(nir_op_infos[cond_op].num_inputs == 2); in test_iterations()
464 nir_alu_type_get_base_type(nir_op_infos[alu->op].output_type); in calculate_iterations()
466 … assert(nir_alu_type_get_base_type(nir_op_infos[cond_alu->op].input_types[1]) == nir_type_int || in calculate_iterations()
467 … nir_alu_type_get_base_type(nir_op_infos[cond_alu->op].input_types[1]) == nir_type_uint); in calculate_iterations()
469 assert(nir_alu_type_get_base_type(nir_op_infos[cond_alu->op].input_types[0]) == in calculate_iterations()
Dnir_opt_copy_propagate.c58 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in is_vec()
85 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in is_swizzleless_move()
227 for (unsigned i = 0; i < nir_op_infos[alu_instr->op].num_inputs; i++) in copy_prop_instr()
Dnir_opt_move_comparisons.c153 for (int i = nir_op_infos[alu->op].num_inputs - 1; i >= 0; i--) { in move_comparisons()
Dnir_opt_undef.c89 for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { in opt_undef_vecN()
Dnir.h818 extern const nir_op_info nir_op_infos[nir_num_opcodes];
848 if (nir_op_infos[instr->op].input_sizes[src] > 0) in nir_alu_instr_channel_used()
849 return channel < nir_op_infos[instr->op].input_sizes[src]; in nir_alu_instr_channel_used()
863 if (nir_op_infos[instr->op].input_sizes[src] > 0) in nir_ssa_alu_instr_src_components()
864 return nir_op_infos[instr->op].input_sizes[src]; in nir_ssa_alu_instr_src_components()
Dnir_validate.c347 (nir_alu_type_get_base_type(nir_op_infos[alu->op].output_type) == in validate_alu_dest()
360 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in validate_alu_instr()
361 nir_alu_type src_type = nir_op_infos[instr->op].input_types[i]; in validate_alu_instr()
380 nir_alu_type dest_type = nir_op_infos[instr->op].output_type; in validate_alu_instr()
Dnir_lower_phis_to_scalar.c67 return nir_op_infos[src_alu->op].output_size == 0 || in is_phi_src_scalarizable()
Dnir_lower_int64.c229 for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) in lower_int64_alu_instr()
Dnir_print.c241 fprintf(fp, " = %s", nir_op_infos[instr->op].name); in print_alu_instr()
248 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in print_alu_instr()
Dnir.c455 unsigned num_srcs = nir_op_infos[op].num_inputs; in nir_alu_instr_create()
1276 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) in visit_alu_src()
1661 assert(src_idx >= 0 && src_idx < nir_op_infos[alu->op].num_inputs); in nir_ssa_def_components_read()
Dnir_serialize.c445 for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) { in write_alu()
468 for (unsigned i = 0; i < nir_op_infos[op].num_inputs; i++) { in read_alu()
/external/mesa3d/src/intel/compiler/
Dbrw_nir_analyze_boolean_resolves.c168 if (nir_alu_type_get_base_type(nir_op_infos[alu->op].output_type) == nir_type_bool) { in analyze_boolean_resolves_block()
Dbrw_vec4_nir.cpp1037 brw_swizzle_for_size(nir_op_infos[cmp_instr->op].input_sizes[0]); in optimize_predicate()
1040 assert(nir_op_infos[cmp_instr->op].num_inputs == 2); in optimize_predicate()
1042 nir_alu_type type = nir_op_infos[cmp_instr->op].input_types[i]; in optimize_predicate()
1164 nir_alu_type dst_type = (nir_alu_type) (nir_op_infos[instr->op].output_type | in nir_emit_alu()
1170 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in nir_emit_alu()
1172 (nir_op_infos[instr->op].input_types[i] | in nir_emit_alu()
1510 brw_swizzle_for_size(nir_op_infos[instr->op].input_sizes[0]); in nir_emit_alu()
1529 brw_swizzle_for_size(nir_op_infos[instr->op].input_sizes[0]); in nir_emit_alu()
Dbrw_fs_nir.cpp497 (nir_alu_type)(nir_op_infos[src0->op].input_types[0] | in optimize_extract_to_float()
644 (nir_alu_type)(nir_op_infos[instr->op].output_type | in nir_emit_alu()
648 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in nir_emit_alu()
651 (nir_alu_type)(nir_op_infos[instr->op].input_types[i] | in nir_emit_alu()
669 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in nir_emit_alu()
715 if (nir_op_infos[instr->op].output_size == 0) { in nir_emit_alu()
725 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in nir_emit_alu()
726 assert(nir_op_infos[instr->op].input_sizes[i] < 2); in nir_emit_alu()
/external/mesa3d/src/broadcom/compiler/
Dnir_to_vir.c653 for (int i = 0; i < nir_op_infos[instr->op].num_inputs; i++) in ntq_emit_alu()
656 for (int i = 0; i < nir_op_infos[instr->op].num_inputs; i++) in ntq_emit_alu()
663 struct qreg src[nir_op_infos[instr->op].num_inputs]; in ntq_emit_alu()
664 for (int i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in ntq_emit_alu()
/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_program.c992 nir_alu_type_get_base_type(nir_op_infos[compare_instr->op].input_types[0]); in ntq_emit_comparison()
1105 for (int i = 0; i < nir_op_infos[instr->op].num_inputs; i++) in ntq_emit_alu()
1108 for (int i = 0; i < nir_op_infos[instr->op].num_inputs; i++) in ntq_emit_alu()
1131 struct qreg src[nir_op_infos[instr->op].num_inputs]; in ntq_emit_alu()
1132 for (int i = 0; i < nir_op_infos[instr->op].num_inputs; i++) { in ntq_emit_alu()

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