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/external/llvm/lib/Target/Mips/
DMicroMipsDSPInstrFormats.td10 class MMDSPInst<string opstr = "">
14 string BaseOpcode = opstr;
25 class POOL32A_3R_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
37 class POOL32A_2R_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
48 class POOL32A_2RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {
61 class POOL32A_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
74 class POOL32A_2RSA4_FMT<string opstr, bits<12> op> : MMDSPInst<opstr> {
86 class POOL32A_2RSA3_FMT<string opstr, bits<7> op> : MMDSPInst<opstr> {
99 class POOL32A_2RSA5B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
112 class POOL32A_2RSA4B0_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
[all …]
DMicroMipsInstrInfo.td185 class CompactBranchMM<string opstr, DAGOperand opnd, PatFrag cond_op,
188 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZC, FrmI> {
196 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
199 !strconcat(opstr, "\t$rt, $addr"),
206 class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
209 !strconcat(opstr, "\t$rt, $addr"),
229 class MovePMM16<string opstr, RegisterOperand RO> :
231 !strconcat(opstr, "\t$dst_regs, $rs, $rt"), [],
251 class StorePairMM<string opstr, InstrItinClass Itin = NoItinerary,
254 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI, opstr> {
[all …]
DMipsInstrFPU.td104 class ADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, bit IsComm,
107 !strconcat(opstr, "\t$fd, $fs, $ft"),
108 [(set RC:$fd, (OpNode RC:$fs, RC:$ft))], Itin, FrmFR, opstr>,
113 multiclass ADDS_M<string opstr, InstrItinClass Itin, bit IsComm,
115 def _D32 : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>, FGR_32;
116 def _D64 : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 {
121 class ABSS_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
123 InstSE<(outs DstRC:$fd), (ins SrcRC:$fs), !strconcat(opstr, "\t$fd, $fs"),
124 [(set DstRC:$fd, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>,
128 multiclass ABSS_M<string opstr, InstrItinClass Itin,
[all …]
DMipsInstrInfo.td1096 class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0,
1100 !strconcat(opstr, "\t$rd, $rs, $rt"),
1101 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
1108 class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
1113 !strconcat(opstr, "\t$rt, $rs, $imm16"),
1115 Itin, FrmI, opstr> {
1121 class MArithR<string opstr, InstrItinClass itin, bit isComm = 0> :
1123 !strconcat(opstr, "\t$rs, $rt"), [], itin, FrmR, opstr> {
1130 class LogicNOR<string opstr, RegisterOperand RO>:
1132 !strconcat(opstr, "\t$rd, $rs, $rt"),
[all …]
DMicroMips32r6InstrInfo.td454 class JALRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO>
455 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
457 MMR6Arch<opstr>, MicroMipsR6Inst16 {
464 class JMP_MMR6_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd,
466 : MMR6Arch<opstr> {
468 string AsmString = !strconcat(opstr, "\t$rt, $offset");
486 class JRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO>
487 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
489 MMR6Arch<opstr>, MicroMipsR6Inst16 {
611 class DIVMOD_MMR6_DESC_BASE<string opstr, RegisterOperand GPROpnd,
[all …]
DMipsCondMov.td19 class CMov_I_I_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
22 !strconcat(opstr, "\t$rd, $rs, $rt"), [], Itin, FrmFR, opstr> {
27 class CMov_I_F_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
30 !strconcat(opstr, "\t$fd, $fs, $rt"), [], Itin, FrmFR, opstr>,
36 class CMov_F_I_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
39 !strconcat(opstr, "\t$rd, $rs, $fcc"),
41 Itin, FrmFR, opstr>, HARDFLOAT {
46 class CMov_F_F_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
49 !strconcat(opstr, "\t$fd, $fs, $fcc"),
51 Itin, FrmFR, opstr>, HARDFLOAT {
DMicroMips64r6InstrFormats.td105 class POOL32S_ARITH_FM_MMR6<string opstr, bits<9> funct>
106 : MMR6Arch<opstr> {
121 class DADDIU_FM_MMR6<string opstr> : MMR6Arch<opstr> {
DMips64InstrInfo.td354 class Count1s<string opstr, RegisterOperand RO>:
355 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
356 [(set RO:$rd, (ctpop RO:$rs))], II_POP, FrmR, opstr> {
360 class ExtsCins<string opstr, SDPatternOperator Op = null_frag>:
362 !strconcat(opstr, " $rt, $rs, $pos, $lenm1"),
364 NoItinerary, FrmR, opstr> {
368 class SetCC64_R<string opstr, PatFrag cond_op> :
370 !strconcat(opstr, "\t$rd, $rs, $rt"),
373 II_SEQ_SNE, FrmR, opstr> {
377 class SetCC64_I<string opstr, PatFrag cond_op>:
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMicroMipsDSPInstrFormats.td10 class MMDSPInst<string opstr = "">
14 string BaseOpcode = opstr;
25 class POOL32A_3R_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
37 class POOL32A_2R_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
48 class POOL32A_2RAC_FMT<string opstr, bits<8> op> : MMDSPInst<opstr> {
61 class POOL32A_3RB0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
74 class POOL32A_2RSA4_FMT<string opstr, bits<12> op> : MMDSPInst<opstr> {
86 class POOL32A_2RSA3_FMT<string opstr, bits<7> op> : MMDSPInst<opstr> {
99 class POOL32A_2RSA5B0_FMT<string opstr, bits<10> op> : MMDSPInst<opstr> {
112 class POOL32A_2RSA4B0_FMT<string opstr, bits<11> op> : MMDSPInst<opstr> {
[all …]
DMicroMipsInstrInfo.td199 class CompactBranchMM<string opstr, DAGOperand opnd, PatFrag cond_op,
202 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZC, FrmI> {
210 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
213 !strconcat(opstr, "\t$rt, $addr"),
218 let BaseOpcode = opstr;
223 class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
226 !strconcat(opstr, "\t$rt, $addr"),
229 let BaseOpcode = opstr;
249 class MovePMM16<string opstr, RegisterOperand RO> :
251 !strconcat(opstr, "\t$dst_regs, $rs, $rt"), [],
[all …]
DMipsInstrInfo.td1360 class ArithLogicR<string opstr, RegisterOperand RO, bit isComm = 0,
1364 !strconcat(opstr, "\t$rd, $rs, $rt"),
1365 [(set RO:$rd, (OpNode RO:$rs, RO:$rt))], Itin, FrmR, opstr> {
1372 class ArithLogicI<string opstr, Operand Od, RegisterOperand RO,
1377 !strconcat(opstr, "\t$rt, $rs, $imm16"),
1379 Itin, FrmI, opstr> {
1385 class MArithR<string opstr, InstrItinClass itin, bit isComm = 0> :
1387 !strconcat(opstr, "\t$rs, $rt"), [], itin, FrmR, opstr> {
1394 class LogicNOR<string opstr, RegisterOperand RO>:
1396 !strconcat(opstr, "\t$rd, $rs, $rt"),
[all …]
DMipsInstrFPU.td109 class ADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, bit IsComm,
112 !strconcat(opstr, "\t$fd, $fs, $ft"),
113 [(set RC:$fd, (OpNode RC:$fs, RC:$ft))], Itin, FrmFR, opstr>,
118 multiclass ADDS_M<string opstr, InstrItinClass Itin, bit IsComm,
120 def _D32 : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>, FGR_32;
121 def _D64 : ADDS_FT<opstr, FGR64Opnd, Itin, IsComm, OpNode>, FGR_64 {
126 class ABSS_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC,
128 InstSE<(outs DstRC:$fd), (ins SrcRC:$fs), !strconcat(opstr, "\t$fd, $fs"),
129 [(set DstRC:$fd, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>,
133 multiclass ABSS_M<string opstr, InstrItinClass Itin,
[all …]
DMicroMips32r6InstrInfo.td455 class JALRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO>
456 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
458 MMR6Arch<opstr> {
465 class JMP_MMR6_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd,
468 : MMR6Arch<opstr> {
470 string AsmString = !strconcat(opstr, "\t$rt, $offset");
489 class JRC16_MMR6_DESC_BASE<string opstr, RegisterOperand RO>
490 : MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
492 MMR6Arch<opstr> {
603 class DIVMOD_MMR6_DESC_BASE<string opstr, RegisterOperand GPROpnd,
[all …]
DMipsCondMov.td19 class CMov_I_I_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
22 !strconcat(opstr, "\t$rd, $rs, $rt"), [], Itin, FrmFR, opstr> {
27 class CMov_I_F_FT<string opstr, RegisterOperand CRC, RegisterOperand DRC,
30 !strconcat(opstr, "\t$fd, $fs, $rt"), [], Itin, FrmFR, opstr>,
36 class CMov_F_I_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
39 !strconcat(opstr, "\t$rd, $rs, $fcc"),
41 Itin, FrmFR, opstr>, HARDFLOAT {
46 class CMov_F_F_FT<string opstr, RegisterOperand RC, InstrItinClass Itin,
49 !strconcat(opstr, "\t$fd, $fs, $fcc"),
51 Itin, FrmFR, opstr>, HARDFLOAT {
DMips64InstrInfo.td430 class Count1s<string opstr, RegisterOperand RO>:
431 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
432 [(set RO:$rd, (ctpop RO:$rs))], II_POP, FrmR, opstr> {
436 class ExtsCins<string opstr, InstrItinClass itin, RegisterOperand RO,
439 !strconcat(opstr, "\t$rt, $rs, $pos, $lenm1"),
441 itin, FrmR, opstr> {
445 class SetCC64_R<string opstr, PatFrag cond_op> :
447 !strconcat(opstr, "\t$rd, $rs, $rt"),
450 II_SEQ_SNE, FrmR, opstr> {
454 class SetCC64_I<string opstr, PatFrag cond_op>:
[all …]
/external/harfbuzz_ng/src/
Dhb-subset-cff-common.hh157 const OPSTR &opstr, in serialize()
162 switch (opstr.op) in serialize()
165 return_trace (FontDict::serialize_offset4_op(c, opstr.op, offsets.charStringsInfo.offset)); in serialize()
168 return_trace (FontDict::serialize_offset4_op(c, opstr.op, offsets.FDArrayInfo.offset)); in serialize()
171 return_trace (FontDict::serialize_offset4_op(c, opstr.op, offsets.FDSelectInfo.offset)); in serialize()
174 return_trace (copy_opstr (c, opstr)); in serialize()
179 unsigned int calculate_serialized_size (const OPSTR &opstr) const in calculate_serialized_size()
181 switch (opstr.op) in calculate_serialized_size()
186 return OpCode_Size (OpCode_longintdict) + 4 + OpCode_Size (opstr.op); in calculate_serialized_size()
189 return opstr.str.len; in calculate_serialized_size()
[all …]
Dhb-subset-cff1.cc128 const CFF1TopDictVal &opstr, in serialize()
133 OpCode op = opstr.op; in serialize()
171 supp_op.str.str = opstr.str.str + opstr.last_arg_offset; in serialize()
172 if ( unlikely (!(opstr.str.len >= opstr.last_arg_offset + 3))) in serialize()
174 supp_op.str.len = opstr.str.len - opstr.last_arg_offset; in serialize()
180 return_trace (CFFTopDict_OpSerializer<CFF1TopDictVal>::serialize (c, opstr, mod.offsets)); in serialize()
185 unsigned int calculate_serialized_size (const CFF1TopDictVal &opstr) const in calculate_serialized_size()
187 OpCode op = opstr.op; in calculate_serialized_size()
209 …return ((OpCode_Size (OpCode_shortint) + 2) * 2) + (opstr.str.len - opstr.last_arg_offset)/* suppl… in calculate_serialized_size()
212 return CFFTopDict_OpSerializer<CFF1TopDictVal>::calculate_serialized_size (opstr); in calculate_serialized_size()
[all …]
Dhb-cff-interp-dict-common.hh61 unsigned int calculate_serialized_op_size (const OPSTR& opstr) const in calculate_serialized_op_size()
63 switch (opstr.op) in calculate_serialized_op_size()
67 return OpCode_Size (OpCode_longintdict) + 4 + OpCode_Size (opstr.op); in calculate_serialized_op_size()
70 return opstr.str.len; in calculate_serialized_op_size()
Dhb-subset-cff2.cc50 const OpStr &opstr, in serialize()
55 switch (opstr.op) in serialize()
58 return_trace (FontDict::serialize_offset4_op(c, opstr.op, offsets.varStoreOffset)); in serialize()
61 return_trace (CFFTopDict_OpSerializer<>::serialize (c, opstr, offsets)); in serialize()
65 unsigned int calculate_serialized_size (const OpStr &opstr) const in calculate_serialized_size()
67 switch (opstr.op) in calculate_serialized_size()
70 return OpCode_Size (OpCode_longintdict) + 4 + OpCode_Size (opstr.op); in calculate_serialized_size()
73 return CFFTopDict_OpSerializer<>::calculate_serialized_size (opstr); in calculate_serialized_size()
Dhb-cff-interp-common.hh582 bool copy_opstr (hb_serialize_context_t *c, const OpStr& opstr) const in copy_opstr()
586 HBUINT8 *d = c->allocate_size<HBUINT8> (opstr.str.len); in copy_opstr()
588 memcpy (d, &opstr.str.str[0], opstr.str.len); in copy_opstr()
/external/swiftshader/third_party/LLVM/lib/Target/PTX/
DPTXInstrLoadStore.td138 multiclass PTX_LD<string opstr, string typestr,
142 !strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
147 !strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
152 !strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
157 !strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
162 !strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
167 !strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
172 multiclass PTX_ST<string opstr, string typestr, RegisterClass RC,
176 !strconcat(opstr, !strconcat(typestr, "\t[$a], $d")),
181 !strconcat(opstr, !strconcat(typestr, "\t[$a], $d")),
[all …]
/external/u-boot/cmd/
Dfpga.c17 static int fpga_get_op(char *opstr);
355 static int fpga_get_op(char *opstr) in fpga_get_op() argument
359 if (!strcmp("info", opstr)) in fpga_get_op()
361 else if (!strcmp("loadb", opstr)) in fpga_get_op()
363 else if (!strcmp("load", opstr)) in fpga_get_op()
366 else if (!strcmp("loadp", opstr)) in fpga_get_op()
370 else if (!strcmp("loadbp", opstr)) in fpga_get_op()
374 else if (!strcmp("loadfs", opstr)) in fpga_get_op()
378 else if (!strcmp("loadmk", opstr)) in fpga_get_op()
381 else if (!strcmp("dump", opstr)) in fpga_get_op()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMipsInstrFPU.td77 class FPLoad<bits<6> op, string opstr, PatFrag FOp, RegisterClass RC,
80 !strconcat(opstr, "\t$ft, $addr"), [(set RC:$ft, (FOp addr:$addr))],
84 class FPStore<bits<6> op, string opstr, PatFrag FOp, RegisterClass RC,
87 !strconcat(opstr, "\t$ft, $addr"), [(store RC:$ft, addr:$addr)],
91 multiclass FFR1_W_M<bits<6> funct, string opstr> {
92 def _S : FFR1<funct, 16, opstr, "w.s", FGR32, FGR32>;
93 def _D32 : FFR1<funct, 17, opstr, "w.d", FGR32, AFGR64>,
95 def _D64 : FFR1<funct, 17, opstr, "w.d", FGR32, FGR64>,
101 multiclass FFR1_L_M<bits<6> funct, string opstr> {
102 def _S : FFR1<funct, 16, opstr, "l.s", FGR64, FGR32>;
[all …]
DMipsInstrFormats.td272 class FFR1<bits<6> funct, bits<5> fmt, string opstr, string fmtstr,
275 !strconcat(opstr, ".", fmtstr, "\t$fd, $fs"), []> {
280 class FFR1P<bits<6> funct, bits<5> fmt, string opstr, string fmtstr,
283 !strconcat(opstr, ".", fmtstr, "\t$fd, $fs"),
288 class FFR2P<bits<6> funct, bits<5> fmt, string opstr,
291 !strconcat(opstr, ".", fmtstr, "\t$fd, $fs, $ft"),
/external/icu/icu4c/source/test/cintltst/
Dputiltst.c330 const char *opstr; in TestCompareVersions() local
338 opstr = testCases[j+1]; in TestCompareVersions()
340 switch(opstr[0]) { in TestCompareVersions()
355 log_verbose("%d: %s %s %s, OK\n", (j/3), v1str, opstr, v2str); in TestCompareVersions()
357 …log_err("%d: %s %s %s: wanted values of the same sign, %d got %d\n", (j/3), v1str, opstr, v2str, o… in TestCompareVersions()

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