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Searched refs:osc (Results 1 – 25 of 63) sorted by relevance

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/external/harfbuzz_ng/src/
Ddev-run.sh36 osc="\033]"
37 if [[ $TERM == screen* ]]; then osc="\033Ptmux;\033\033]"; fi
56 printf "\n${osc}1337;File=;inline=1:`cat $tmp | base64`${st}\n"
69 printf "\n${osc}1337;File=;inline=1:`cat $tmp | base64`${st}\n"
/external/u-boot/arch/arm/mach-socfpga/
Dwrap_pll_config.c128 const unsigned int cm_get_osc_clk_hz(const int osc) in cm_get_osc_clk_hz() argument
130 if (osc == 1) in cm_get_osc_clk_hz()
132 else if (osc == 2) in cm_get_osc_clk_hz()
/external/u-boot/arch/xtensa/dts/
Dxtfpga.dtsi39 osc: main-oscillator { label
66 clocks = <&osc>;
75 clocks = <&osc>;
95 clocks = <&osc>;
/external/eigen/test/
Dproduct_mmtr.cpp40 MatrixColMaj osc(othersize,size); osc.setRandom(); in mmtr() local
59 CHECK_MMTR(matc, Upper, -= s*(osc.transpose()*osc.conjugate())); in mmtr()
/external/u-boot/doc/device-tree-bindings/clock/
Dnvidia,tegra20-car.txt13 the 32 KHz "32k_in", and the board-specific oscillator "osc".
135 104 osc
184 osc: clock {
205 clocks = <&clk_32k> <&osc>;
/external/u-boot/arch/arm/mach-tegra/
Dcpu.c233 enum clock_osc_freq osc; in init_pllx() local
250 osc = clock_get_osc_freq(); in init_pllx()
251 debug("%s: osc = %d\n", __func__, osc); in init_pllx()
254 sel = &tegra_pll_x_table[chip_sku][osc]; in init_pllx()
/external/sl4a/ScriptingLayerForAndroid/src/de/mud/terminal/
Dvt320.java829 private String osc, dcs; /* to memorize OSC & DCS control sequence */ field in vt320
1276 private void handle_osc(String osc) { in handle_osc() argument
1277 if (osc.length() > 2 && osc.substring(0, 2).equals("4;")) { in handle_osc()
1279 String[] colorData = osc.split(";"); in handle_osc()
1293 debugStr.append("OSC: invalid color sequence encountered: ").append(osc); in handle_osc()
1298 debug("OSC: " + osc); in handle_osc()
1640 osc = ""; in putChar()
1928 handle_osc(osc); in putChar()
1933 if (c == '\\' && osc.charAt(osc.length() - 1) == ESC) { in putChar()
1934 handle_osc(osc); in putChar()
[all …]
/external/u-boot/drivers/clk/
Dclk_stm32mp1.c404 ulong osc[NB_OSC]; member
721 (u32)priv->osc[idx], priv->osc[idx] / 1000); in stm32mp1_clk_get_fixed()
723 return priv->osc[idx]; in stm32mp1_clk_get_fixed()
1546 if (priv->osc[_LSI]) in stm32mp1_clktree()
1549 if (priv->osc[_LSE]) { in stm32mp1_clktree()
1562 if (priv->osc[_HSE]) { in stm32mp1_clktree()
1588 if (priv->osc[_HSI]) { in stm32mp1_clktree()
1589 stm32mp1_hsidiv(rcc, priv->osc[_HSI]); in stm32mp1_clktree()
1646 if (priv->osc[_LSE]) in stm32mp1_clktree()
1685 if (!priv->osc[_HSI]) in stm32mp1_clktree()
[all …]
/external/adhd/scripts/audio_tuning/frontend/
Daudio.js134 var osc = context.createOscillator();
139 osc.type = 'sawtooth';
140 osc.frequency.value = 8 * 440;
145 osc.connect(filter1);
146 osc.connect(filter2);
150 osc.start();
677 var osc = context.createOscillator();
678 osc.frequency.value = 15000;
682 osc.connect(gain);
685 osc.start();
/external/u-boot/arch/arm/include/asm/
Ddavinci_rtc.h37 unsigned int osc; member
/external/u-boot/arch/arm/dts/
Dimx7ulp.dtsi87 osc: clock@1 { label
91 clock-output-names = "osc";
375 clocks = <&ckil>, <&osc>, <&sirc>,
377 clock-names = "ckil", "osc", "sirc",
Dimx6ul.dtsi87 "pll1_bypass_src", "osc";
110 osc: clock-osc { label
114 clock-output-names = "osc";
515 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
516 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
Dimx6sll.dtsi102 osc: clock@1 { label
107 clock-output-names = "osc";
148 "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc",
497 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
498 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
Dimx6ull.dtsi82 "pll1_sw", "pll1_sys", "pll1_bypass", "pll1", "pll1_bypass_src", "osc";
106 osc: clock@1 { label
111 clock-output-names = "osc";
152 "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc",
608 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
609 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
Dat91sam9n12.dtsi113 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
121 compatible = "atmel,at91rm9200-clk-main-osc";
408 compatible = "atmel,at91sam9x5-clk-slow-osc";
414 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
Dimx7s.dtsi112 osc: clock-osc { label
116 clock-output-names = "osc";
615 clocks = <&ckil>, <&osc>;
616 clock-names = "ckil", "osc";
/external/libvterm/src/
Dparser.c105 if(vt->parser.callbacks && vt->parser.callbacks->osc) in done_string()
106 if((*vt->parser.callbacks->osc)(str, len, vt->parser.cbdata)) in done_string()
/external/u-boot/arch/mips/dts/
Dbrcm,bcm6338.dtsi38 periph_osc: periph-osc {
Dbrcm,bcm6348.dtsi38 periph_osc: periph-osc {
Dbrcm,bcm3380.dtsi45 periph_osc: periph-osc {
Dbrcm,bcm6368.dtsi45 periph_osc: periph-osc {
Dbrcm,bcm6328.dtsi52 periph_osc: periph-osc {
Dbrcm,bcm6318.dtsi45 periph_osc: periph-osc {
Dbrcm,bcm6358.dtsi45 periph_osc: periph-osc {
/external/u-boot/arch/arm/mach-socfpga/include/mach/
Dclock_manager_gen5.h121 const unsigned int cm_get_osc_clk_hz(const int osc);

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