| /external/u-boot/arch/arm/mach-keystone/ |
| D | ddr3.c | 24 void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg) in ddr3_init_ddrphy() argument
32 __raw_writel(phy_cfg->pllcr, base + KS2_DDRPHY_PLLCR_OFFSET); in ddr3_init_ddrphy()
35 tmp &= ~(phy_cfg->pgcr1_mask); in ddr3_init_ddrphy()
36 tmp |= phy_cfg->pgcr1_val; in ddr3_init_ddrphy()
39 __raw_writel(phy_cfg->ptr0, base + KS2_DDRPHY_PTR0_OFFSET); in ddr3_init_ddrphy()
40 __raw_writel(phy_cfg->ptr1, base + KS2_DDRPHY_PTR1_OFFSET); in ddr3_init_ddrphy()
41 __raw_writel(phy_cfg->ptr3, base + KS2_DDRPHY_PTR3_OFFSET); in ddr3_init_ddrphy()
42 __raw_writel(phy_cfg->ptr4, base + KS2_DDRPHY_PTR4_OFFSET); in ddr3_init_ddrphy()
45 tmp &= ~(phy_cfg->dcr_mask); in ddr3_init_ddrphy()
46 tmp |= phy_cfg->dcr_val; in ddr3_init_ddrphy()
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| D | ddr3_spd.c | 304 spd_cb->phy_cfg.pllcr = (spd->freqsel & 3) << 18 | 0xE << 13; in init_ddr3param()
305 spd_cb->phy_cfg.pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK); in init_ddr3param()
306 spd_cb->phy_cfg.pgcr1_val = ((1 << 2) | (1 << 7) | (1 << 23)); in init_ddr3param()
307 spd_cb->phy_cfg.ptr0 = ((spd->t_pllpd & 0x7ff) << 21) | in init_ddr3param()
309 spd_cb->phy_cfg.ptr1 = ((spd->t_plllock & 0xffff) << 16) | in init_ddr3param()
311 spd_cb->phy_cfg.ptr2 = 0; in init_ddr3param()
312 spd_cb->phy_cfg.ptr3 = ((spd->t_dinit1 & 0x1ff) << 20) | in init_ddr3param()
314 spd_cb->phy_cfg.ptr4 = ((spd->t_dinit3 & 0x3ff) << 18) | in init_ddr3param()
317 spd_cb->phy_cfg.dcr_mask = PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK; in init_ddr3param()
318 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
[all …]
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| /external/u-boot/drivers/usb/phy/ |
| D | rockchip_usb2_phy.c | 68 struct rockchip_usb2_phy_cfg *phy_cfg = NULL; in otg_phy_init() local
76 phy_cfg = (struct rockchip_usb2_phy_cfg *)of_id->data; in otg_phy_init()
80 if (!phy_cfg) { in otg_phy_init()
86 pdata->priv = phy_cfg; in otg_phy_init()
88 property_enable(pdata, &phy_cfg->soft_con, false); in otg_phy_init()
91 property_enable(pdata, &phy_cfg->port_reset, true); in otg_phy_init()
93 property_enable(pdata, &phy_cfg->port_reset, false); in otg_phy_init()
100 struct rockchip_usb2_phy_cfg *phy_cfg = pdata->priv; in otg_phy_off() local
103 property_enable(pdata, &phy_cfg->soft_con, true); in otg_phy_off()
105 property_enable(pdata, &phy_cfg->suspend, true); in otg_phy_off()
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| /external/u-boot/board/ti/ks2_evm/ |
| D | ddr3_k2hk.c | 45 spd_cb.phy_cfg.zq0cr1 |= 0x10000; in ddr3_init()
46 spd_cb.phy_cfg.zq1cr1 |= 0x10000; in ddr3_init()
47 spd_cb.phy_cfg.zq2cr1 |= 0x10000; in ddr3_init()
49 ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &spd_cb.phy_cfg); in ddr3_init()
55 ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &spd_cb.phy_cfg); in ddr3_init()
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| D | ddr3_k2e.c | 38 spd_cb.phy_cfg.zq0cr1 |= 0x10000; in ddr3_init()
39 spd_cb.phy_cfg.zq1cr1 |= 0x10000; in ddr3_init()
40 spd_cb.phy_cfg.zq2cr1 |= 0x10000; in ddr3_init()
41 ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &spd_cb.phy_cfg); in ddr3_init()
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| /external/u-boot/arch/arm/mach-keystone/include/mach/ |
| D | ddr3.h | 66 struct ddr3_phy_config phy_cfg; member
80 void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg);
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| /external/u-boot/drivers/video/ |
| D | dw_hdmi.c | 316 if (!hdmi->mpll_cfg || !hdmi->phy_cfg) in hdmi_phy_configure()
347 for (i = 0; hdmi->phy_cfg[i].mpixelclock != (~0ul); i++) in hdmi_phy_configure()
348 if (mpixelclock <= hdmi->phy_cfg[i].mpixelclock) in hdmi_phy_configure()
356 hdmi_phy_i2c_write(hdmi, hdmi->phy_cfg[i].term, PHY_TXTERM); in hdmi_phy_configure()
357 hdmi_phy_i2c_write(hdmi, hdmi->phy_cfg[i].sym_ctr, PHY_CKSYMTXCTRL); in hdmi_phy_configure()
358 hdmi_phy_i2c_write(hdmi, hdmi->phy_cfg[i].vlev_ctr, PHY_VLEVCTRL); in hdmi_phy_configure()
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| /external/u-boot/drivers/video/rockchip/ |
| D | rk_hdmi.c | 88 hdmi->phy_cfg = rockchip_phy_config; in rk_hdmi_ofdata_to_platdata()
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| /external/u-boot/arch/arm/mach-rockchip/rk3036/ |
| D | sdram_rk3036.c | 624 static void phy_cfg(struct rk3036_sdram_priv *priv) in phy_cfg() function
757 phy_cfg(&sdram_priv); in sdram_init()
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| /external/u-boot/include/ |
| D | dw_hdmi.h | 469 const struct hdmi_phy_config *phy_cfg; member
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| /external/u-boot/drivers/ram/rockchip/ |
| D | sdram_rk322x.c | 468 static void phy_cfg(struct chan_info *chan, in phy_cfg() function
700 phy_cfg(&dram->chan[0], sdram_params); in sdram_init()
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| D | sdram_rk3188.c | 255 static void phy_cfg(const struct chan_info *chan, int channel, in phy_cfg() function
740 phy_cfg(chan, channel, sdram_params); in sdram_init()
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| D | sdram_rk3288.c | 289 static void phy_cfg(const struct chan_info *chan, int channel, in phy_cfg() function
821 phy_cfg(chan, channel, sdram_params); in sdram_init()
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| /external/u-boot/arch/arm/dts/ |
| D | rk3399.dtsi | 1490 clock-names = "ref", "pclk", "phy_cfg";
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