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/external/mesa3d/src/gallium/drivers/svga/
Dsvga_pipe_blend.c111 perRT[i].blendEnable = bs->rt[i].blend_enable; in define_blend_state_object()
112 perRT[i].srcBlend = bs->rt[i].srcblend; in define_blend_state_object()
113 perRT[i].destBlend = bs->rt[i].dstblend; in define_blend_state_object()
114 perRT[i].blendOp = bs->rt[i].blendeq; in define_blend_state_object()
115 perRT[i].srcBlendAlpha = bs->rt[i].srcblend_alpha; in define_blend_state_object()
116 perRT[i].destBlendAlpha = bs->rt[i].dstblend_alpha; in define_blend_state_object()
117 perRT[i].blendOpAlpha = bs->rt[i].blendeq_alpha; in define_blend_state_object()
118 perRT[i].renderTargetWriteMask = bs->rt[i].writemask; in define_blend_state_object()
163 blend->rt[i].blend_enable = TRUE; in svga_create_blend_state()
164 blend->rt[i].srcblend = SVGA3D_BLENDOP_ONE; in svga_create_blend_state()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsMTInstrInfo.td46 dag OutOperandList = (outs GPR32Opnd:$rt);
48 string AsmString = !strconcat(instr_asm, "\t$rt");
55 dag InOperandList = (ins GPR32Opnd:$rt, uimm1:$u, uimm3:$sel, uimm1:$h);
56 string AsmString = "mftr\t$rd, $rt, $u, $sel, $h";
63 dag InOperandList = (ins GPR32Opnd:$rt, uimm1:$u, uimm3:$sel, uimm1:$h);
64 string AsmString = "mttr\t$rt, $rd, $u, $sel, $h";
71 dag InOperandList = (ins GPR32Opnd:$rt);
72 string AsmString = "fork\t$rd, $rs, $rt";
118 def MFTC0 : MipsAsmPseudoInst<(outs GPR32Opnd:$rd), (ins COP0Opnd:$rt,
120 "mftc0 $rd, $rt, $sel">, ASE_MT;
[all …]
DMicroMips32r6InstrFormats.td69 bits<5> rt;
76 let Inst{25-21} = rt;
82 bits<5> rt;
89 let Inst{25-21} = rt;
105 bits<2> rt;
111 let Inst{9-8} = rt;
118 bits<5> rt;
123 let Inst{25-21} = rt;
145 bits<5> rt;
151 let Inst{25-21} = rt;
[all …]
DMicroMipsDSPInstrFormats.td28 bits<5> rt;
31 let Inst{25-21} = rt;
38 bits<5> rt;
42 let Inst{25-21} = rt;
49 bits<5> rt;
54 let Inst{25-21} = rt;
64 bits<5> rt;
67 let Inst{25-21} = rt;
75 bits<5> rt;
80 let Inst{25-21} = rt;
[all …]
/external/tensorflow/tensorflow/python/ops/ragged/
Dragged_tensor_test.py126 rt = RaggedTensor.from_row_splits(
128 self.assertRaggedEqual(rt, [[3, 1, 4, 1], [], [5, 9, 2], [6], []])
129 del rt
139 for rt in (rt1, rt2, rt3, rt4, rt5):
140 self.assertRaggedEqual(rt, [[3, 1, 4, 1], [], [5, 9, 2], [6], []])
155 rt = RaggedTensor.from_nested_row_splits(
159 self.eval_to_list(rt), [[[3, 1, 4, 1], [], [5, 9, 2]], [], [[6], []]])
160 del rt
163 rt = RaggedTensor.from_row_splits(
166 self.eval_to_list(rt),
[all …]
Dragged_from_tensor_op_test.py315 rt = RaggedTensor.from_tensor(dt, lengths, padding, ragged_rank)
317 rt = RaggedTensor.from_tensor(dt, lengths, padding)
318 self.assertEqual(type(rt), RaggedTensor)
319 self.assertEqual(rt.ragged_rank, ragged_rank)
321 dt.shape.is_compatible_with(rt.shape),
322 '%s is incompatible with %s' % (dt.shape, rt.shape))
323 self.assertRaggedEqual(rt, expected)
331 rt = RaggedTensor.from_tensor(dt, ragged_rank=ragged_rank)
332 self.assertEqual(type(rt), RaggedTensor)
333 self.assertEqual(rt.ragged_rank, ragged_rank)
[all …]
/external/toybox/toys/pending/
Droute.c192 static void get_next_params(char **argv, struct rtentry *rt, char **netmask) in get_next_params() argument
195 if (!strcmp(*argv, "reject")) rt->rt_flags |= RTF_REJECT; in get_next_params()
196 else if (!strcmp(*argv, "mod")) rt->rt_flags |= RTF_MODIFIED; in get_next_params()
197 else if (!strcmp(*argv, "dyn")) rt->rt_flags |= RTF_DYNAMIC; in get_next_params()
198 else if (!strcmp(*argv, "reinstate")) rt->rt_flags |= RTF_REINSTATE; in get_next_params()
204 rt->rt_metric = atolx_range(argv[1], 0, ULONG_MAX) + 1; in get_next_params()
208 unsigned int addr_mask = (((struct sockaddr_in *)&((rt)->rt_genmask))->sin_addr.s_addr); in get_next_params()
213 rt->rt_genmask = sock; in get_next_params()
216 if (!(rt->rt_flags & RTF_GATEWAY)) { in get_next_params()
217 if (!get_hostname(argv[1], (struct sockaddr_in *) &rt->rt_gateway)) in get_next_params()
[all …]
/external/iptables/extensions/
Dlibip6t_rt.t2 -m rt --rt-type 0 --rt-segsleft 1:23 --rt-len 42 --rt-0-res;=;OK
3 -m rt --rt-type 0 ! --rt-segsleft 1:23 ! --rt-len 42 --rt-0-res;=;OK
4 -m rt ! --rt-type 1 ! --rt-segsleft 12:23 ! --rt-len 42;=;OK
5 -m rt;=;OK
/external/python/cpython3/Lib/lib2to3/tests/
Dtest_refactor.py42 def rt(self, options=None, fixers=_DEFAULT_FIXERS, explicit=None): member in TestRefactoringTool
46 rt = self.rt({"print_function" : True})
47 self.assertIs(rt.grammar, pygram.python_grammar_no_print_statement)
48 self.assertIs(rt.driver.grammar,
52 rt = self.rt()
53 self.assertFalse(rt.write_unchanged_files)
54 rt = self.rt({"write_unchanged_files" : True})
55 self.assertTrue(rt.write_unchanged_files)
139 rt = self.rt()
140 pre, post = rt.get_fixers()
[all …]
/external/python/cpython2/Lib/lib2to3/tests/
Dtest_refactor.py48 def rt(self, options=None, fixers=_DEFAULT_FIXERS, explicit=None): member in TestRefactoringTool
52 rt = self.rt({"print_function" : True})
53 self.assertIs(rt.grammar, pygram.python_grammar_no_print_statement)
54 self.assertIs(rt.driver.grammar,
58 rt = self.rt()
59 self.assertFalse(rt.write_unchanged_files)
60 rt = self.rt({"write_unchanged_files" : True})
61 self.assertTrue(rt.write_unchanged_files)
145 rt = self.rt()
146 pre, post = rt.get_fixers()
[all …]
/external/llvm/lib/Target/Mips/
DMicroMips32r6InstrFormats.td75 bits<5> rt;
82 let Inst{25-21} = rt;
88 bits<5> rt;
95 let Inst{25-21} = rt;
111 bits<2> rt;
117 let Inst{9-8} = rt;
124 bits<5> rt;
129 let Inst{25-21} = rt;
151 bits<5> rt;
157 let Inst{25-21} = rt;
[all …]
DMicroMips64r6InstrFormats.td15 bits<5> rt;
22 let Inst{25-21} = rt;
40 bits<5> rt;
48 let Inst{25-21} = rt;
57 bits<5> rt;
65 let Inst{20-16} = rt;
74 bits<5> rt;
81 let Inst{25-21} = rt;
90 bits<5> rt;
97 let Inst{25-21} = rt;
[all …]
DMicroMipsDSPInstrFormats.td28 bits<5> rt;
31 let Inst{25-21} = rt;
38 bits<5> rt;
42 let Inst{25-21} = rt;
49 bits<5> rt;
54 let Inst{25-21} = rt;
64 bits<5> rt;
67 let Inst{25-21} = rt;
75 bits<5> rt;
80 let Inst{25-21} = rt;
[all …]
/external/mesa3d/src/gallium/drivers/freedreno/a3xx/
Dfd3_blend.c97 const struct pipe_rt_blend_state *rt; in fd3_blend_state_create() local
99 rt = &cso->rt[i]; in fd3_blend_state_create()
101 rt = &cso->rt[0]; in fd3_blend_state_create()
104 A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(rt->rgb_src_factor)) | in fd3_blend_state_create()
105 A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) | in fd3_blend_state_create()
106 A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor)); in fd3_blend_state_create()
109 A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(fd_blend_factor(rt->alpha_src_factor)) | in fd3_blend_state_create()
110 A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(blend_func(rt->alpha_func)) | in fd3_blend_state_create()
111 A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor)); in fd3_blend_state_create()
114 …A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_src_f… in fd3_blend_state_create()
[all …]
/external/mesa3d/src/gallium/drivers/freedreno/a2xx/
Dfd2_blend.c63 const struct pipe_rt_blend_state *rt = &cso->rt[0]; in fd2_blend_state_create() local
84 A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND(fd_blend_factor(rt->rgb_src_factor)) | in fd2_blend_state_create()
85 A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(blend_func(rt->rgb_func)) | in fd2_blend_state_create()
86 A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND(fd_blend_factor(rt->rgb_dst_factor)); in fd2_blend_state_create()
89 A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND(fd_blend_factor(rt->alpha_src_factor)) | in fd2_blend_state_create()
90 A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(blend_func(rt->alpha_func)) | in fd2_blend_state_create()
91 A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND(fd_blend_factor(rt->alpha_dst_factor)); in fd2_blend_state_create()
94 …A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_src_facto… in fd2_blend_state_create()
95 A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(blend_func(rt->rgb_func)) | in fd2_blend_state_create()
96 …A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_dst_fact… in fd2_blend_state_create()
[all …]
/external/icu/icu4c/source/test/testdata/
DNumberFormatTestCases.txt14 rt: "0.###" 1.0 "1"
23 rt: "0" 1234 "1234"
33 rt: "@@@@" 0.0012 "0.001200"
36 rt: "@###" 0.00123 "0.00123"
37 rt: - 123000 "123000"
43 rt: - 123000 "123,000"
45 rt: - 0.9999 "0.9999"
47 rt: "@##E0" 20000 "2E4"
48 rt: - 27000 "2.7E4"
49 rt: - 27100 "2.71E4"
[all …]
/external/v8/src/mips/
Dmacro-assembler-mips.cc44 static inline bool IsZero(const Operand& rt) { in IsZero() argument
45 if (rt.is_reg()) { in IsZero()
46 return rt.rm() == zero_reg; in IsZero()
48 return rt.immediate() == 0; in IsZero()
370 void TurboAssembler::Addu(Register rd, Register rs, const Operand& rt) { in Addu() argument
371 if (rt.is_reg()) { in Addu()
372 addu(rd, rs, rt.rm()); in Addu()
374 if (is_int16(rt.immediate()) && !MustUseReg(rt.rmode())) { in Addu()
375 addiu(rd, rs, rt.immediate()); in Addu()
381 li(scratch, rt); in Addu()
[all …]
/external/mesa3d/src/gallium/drivers/freedreno/a4xx/
Dfd4_blend.c95 const struct pipe_rt_blend_state *rt; in fd4_blend_state_create() local
98 rt = &cso->rt[i]; in fd4_blend_state_create()
100 rt = &cso->rt[0]; in fd4_blend_state_create()
103 A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(rt->rgb_src_factor)) | in fd4_blend_state_create()
104 A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) | in fd4_blend_state_create()
105 A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor)); in fd4_blend_state_create()
108 A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(fd_blend_factor(rt->alpha_src_factor)) | in fd4_blend_state_create()
109 A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(blend_func(rt->alpha_func)) | in fd4_blend_state_create()
110 A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor)); in fd4_blend_state_create()
113 …A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_src_f… in fd4_blend_state_create()
[all …]
/external/mesa3d/src/gallium/drivers/freedreno/a5xx/
Dfd5_blend.c96 const struct pipe_rt_blend_state *rt; in fd5_blend_state_create() local
99 rt = &cso->rt[i]; in fd5_blend_state_create()
101 rt = &cso->rt[0]; in fd5_blend_state_create()
104 A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(rt->rgb_src_factor)) | in fd5_blend_state_create()
105 A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(blend_func(rt->rgb_func)) | in fd5_blend_state_create()
106 A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(fd_blend_factor(rt->rgb_dst_factor)); in fd5_blend_state_create()
109 A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(fd_blend_factor(rt->alpha_src_factor)) | in fd5_blend_state_create()
110 A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(blend_func(rt->alpha_func)) | in fd5_blend_state_create()
111 A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(fd_blend_factor(rt->alpha_dst_factor)); in fd5_blend_state_create()
114 …A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(fd_blend_factor(util_blend_dst_alpha_to_one(rt->rgb_src_f… in fd5_blend_state_create()
[all …]
/external/v8/src/mips64/
Dmacro-assembler-mips64.cc44 static inline bool IsZero(const Operand& rt) { in IsZero() argument
45 if (rt.is_reg()) { in IsZero()
46 return rt.rm() == zero_reg; in IsZero()
48 return rt.immediate() == 0; in IsZero()
370 void TurboAssembler::Addu(Register rd, Register rs, const Operand& rt) { in Addu() argument
371 if (rt.is_reg()) { in Addu()
372 addu(rd, rs, rt.rm()); in Addu()
374 if (is_int16(rt.immediate()) && !MustUseReg(rt.rmode())) { in Addu()
375 addiu(rd, rs, static_cast<int32_t>(rt.immediate())); in Addu()
381 li(scratch, rt); in Addu()
[all …]
/external/icu/android_icu4j/src/main/tests/android/icu/dev/test/format/
DNumberFormatTestCases.txt16 rt: "0.###" 1.0 "1"
25 rt: "0" 1234 "1234"
35 rt: "@@@@" 0.0012 "0.001200"
38 rt: "@###" 0.00123 "0.00123"
39 rt: - 123000 "123000"
45 rt: - 123000 "123,000"
47 rt: - 0.9999 "0.9999"
49 rt: "@##E0" 20000 "2E4"
50 rt: - 27000 "2.7E4"
51 rt: - 27100 "2.71E4"
[all …]
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/format/
DNumberFormatTestCases.txt16 rt: "0.###" 1.0 "1"
25 rt: "0" 1234 "1234"
35 rt: "@@@@" 0.0012 "0.001200"
38 rt: "@###" 0.00123 "0.00123"
39 rt: - 123000 "123000"
45 rt: - 123000 "123,000"
47 rt: - 0.9999 "0.9999"
49 rt: "@##E0" 20000 "2E4"
50 rt: - 27000 "2.7E4"
51 rt: - 27100 "2.71E4"
[all …]
/external/strace/tests-mx32/
Dioctl_rtc.c43 print_rtc_time(const struct rtc_time *rt) in print_rtc_time() argument
47 rt->tm_sec, rt->tm_min, rt->tm_hour, in print_rtc_time()
48 rt->tm_mday, rt->tm_mon, rt->tm_year); in print_rtc_time()
51 rt->tm_wday, rt->tm_yday, rt->tm_isdst); in print_rtc_time()
77 TAIL_ALLOC_OBJECT_CONST_PTR(struct rtc_time, rt); in main()
78 fill_memory(rt, sizeof(*rt)); in main()
104 ioctl(-1, RTC_ALM_SET, rt); in main()
106 print_rtc_time(rt); in main()
114 ioctl(-1, RTC_SET_TIME, rt); in main()
116 print_rtc_time(rt); in main()
/external/strace/tests-m32/
Dioctl_rtc.c43 print_rtc_time(const struct rtc_time *rt) in print_rtc_time() argument
47 rt->tm_sec, rt->tm_min, rt->tm_hour, in print_rtc_time()
48 rt->tm_mday, rt->tm_mon, rt->tm_year); in print_rtc_time()
51 rt->tm_wday, rt->tm_yday, rt->tm_isdst); in print_rtc_time()
77 TAIL_ALLOC_OBJECT_CONST_PTR(struct rtc_time, rt); in main()
78 fill_memory(rt, sizeof(*rt)); in main()
104 ioctl(-1, RTC_ALM_SET, rt); in main()
106 print_rtc_time(rt); in main()
114 ioctl(-1, RTC_SET_TIME, rt); in main()
116 print_rtc_time(rt); in main()
/external/strace/tests/
Dioctl_rtc.c43 print_rtc_time(const struct rtc_time *rt) in print_rtc_time() argument
47 rt->tm_sec, rt->tm_min, rt->tm_hour, in print_rtc_time()
48 rt->tm_mday, rt->tm_mon, rt->tm_year); in print_rtc_time()
51 rt->tm_wday, rt->tm_yday, rt->tm_isdst); in print_rtc_time()
77 TAIL_ALLOC_OBJECT_CONST_PTR(struct rtc_time, rt); in main()
78 fill_memory(rt, sizeof(*rt)); in main()
104 ioctl(-1, RTC_ALM_SET, rt); in main()
106 print_rtc_time(rt); in main()
114 ioctl(-1, RTC_SET_TIME, rt); in main()
116 print_rtc_time(rt); in main()

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