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Searched refs:s_load_dword (Results 1 – 25 of 231) sorted by relevance

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/external/llvm/test/CodeGen/AMDGPU/
Dllvm.r600.read.local.size.ll10 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x6
11 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x18
12 ; CI-HSA: s_load_dword [[XY:s[0-9]+]], s[4:5], 0x1
13 ; VI-HSA: s_load_dword [[XY:s[0-9]+]], s[4:5], 0x4
28 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x7
29 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x1c
43 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x8
44 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x20
55 ; SI-NOHSA-DAG: s_load_dword [[X:s[0-9]+]], s[0:1], 0x6
56 ; SI-NOHSA-DAG: s_load_dword [[Y:s[0-9]+]], s[0:1], 0x7
[all …]
Duse-sgpr-multiple-times.ll11 ; GCN: s_load_dword [[SGPR:s[0-9]+]],
21 ; GCN: s_load_dword [[SGPR:s[0-9]+]],
31 ; SI-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
32 ; SI-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
33 ; VI-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
34 ; VI-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30
45 ; GCN-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}}
46 ; GCN-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xc|0x30}}
71 ; SI-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
72 ; SI-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
[all …]
Damdgpu.work-item-intrinsics.deprecated.ll8 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0xb
9 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x2c
23 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x0
24 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x0
38 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x1
39 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x4
53 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x2
54 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x8
68 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x3
69 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0xc
[all …]
Datomic_cmp_swap_local.ll6 ; SICI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
7 ; SICI: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
8 ; VI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
9 ; VI: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30
24 ; SICI-DAG: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
26 ; VI-DAG: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
59 ; SICI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x9
60 ; SICI: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xa
61 ; VI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x24
62 ; VI: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x28
[all …]
Dllvm.amdgcn.div.fixup.ll8 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
9 ; SI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xd
10 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
11 ; VI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
12 ; VI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x34
13 ; VI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30
Dllvm.amdgcn.read.workdim.ll5 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0xb
6 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x2c
17 ; SI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0xb
18 ; VI: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x2c
32 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0xb
33 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x2c
Doperand-spacing.ll7 ; SI-DAG: s_load_dword [[SREGA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
8 ; SI-DAG: s_load_dword [[SREGB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc
9 ; VI-DAG: s_load_dword [[SREGA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
10 ; VI-DAG: s_load_dword [[SREGB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dllvm.r600.read.local.size.ll10 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x6
11 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x18
12 ; CI-HSA: s_load_dword [[XY:s[0-9]+]], s[4:5], 0x1
13 ; VI-HSA: s_load_dword [[XY:s[0-9]+]], s[4:5], 0x4
28 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x7
29 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x1c
43 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x8
44 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x20
55 ; SI-NOHSA-DAG: s_load_dword [[X:s[0-9]+]], s[0:1], 0x6
56 ; SI-NOHSA-DAG: s_load_dword [[Y:s[0-9]+]], s[0:1], 0x7
[all …]
Dkernel-argument-dag-lowering.ll11 ; GCN: s_load_dword s
22 ; HSA-VI: s_load_dword s{{[0-9]+}}, s[4:5], 0x8
58 ; HSA-VI: s_load_dword s{{[0-9]+}}, s[4:5], 0x0
60 ; HSA-VI: s_load_dword s{{[0-9]+}}, s[4:5], 0x18
80 ; HSA-VI: s_load_dword s{{[0-9]+}}, s[4:5], 0x0
96 ; HSA-VI: s_load_dword s{{[0-9]+}}, s[4:5], 0x0
98 ; HSA-VI: s_load_dword s{{[0-9]+}}, s[4:5], 0x18
115 ; HSA-VI: s_load_dword s{{[0-9]+}}, s[4:5], 0x0
116 ; HSA-VI: s_load_dword s{{[0-9]+}}, s[4:5], 0x4
117 ; HSA-VI: s_load_dword s{{[0-9]+}}, s[4:5], 0x8
[all …]
Dkernel-args.ll11 ; SI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
12 ; MESA-VI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x2c
15 ; HSA-VI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x8
30 ; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
31 ; MESA-VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
33 ; HSA-VI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x8
54 ; SI: s_load_dword s{{[0-9]}}, s[0:1], 0xb
56 ; MESA-VI: s_load_dword s{{[0-9]}}, s[0:1], 0x2c
58 ; HSA-VI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x8
81 ; SI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
[all …]
Damdgpu.work-item-intrinsics.deprecated.ll8 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x0
9 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x0
23 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x1
24 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x4
38 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x2
39 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x8
53 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x3
54 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0xc
68 ; SI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x4
69 ; VI-NOHSA: s_load_dword [[VAL:s[0-9]+]], s[0:1], 0x10
[all …]
Datomic_cmp_swap_local.ll10 ; SICI-DAG: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
11 ; SICI-DAG: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1c
12 ; GFX89-DAG: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x4c
13 ; GFX89-DAG: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x70
31 ; SICI-DAG: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
33 ; GFX89-DAG: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
72 ; SICI-DAG: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x9
73 ; SICI-DAG: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x12
74 ; GFX89-DAG: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x24
75 ; GFX89-DAG: s_load_dword [[SWAP:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x48
[all …]
Dllvm.amdgcn.kernarg.segment.ptr.ll10 ; CO-V2: s_load_dword s{{[0-9]+}}, s[4:5], 0xa
12 ; OS-UNKNOWN: s_load_dword s{{[0-9]+}}, s[0:1], 0xa
28 ; OS-UNKNOWN: s_load_dword s{{[0-9]+}}, s[0:1], 0x15
44 ; OS-UNKNOWN: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xc
45 ; HSA: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x4
46 ; OS-MESA3D: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x3
64 ; OS-UNKNOWN: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xc
65 ; HSA: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x4
66 ; OS-MESA3D: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0x3
84 ; HSA: s_load_dword s{{[0-9]+}}, s[4:5]
Dllvm.amdgcn.div.fmas.ll11 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
12 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1c
13 ; SI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x25
15 ; VI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x4c
16 ; VI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x70
17 ; VI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x94
34 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1c
35 ; SI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x25
47 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
48 ; SI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xd
[all …]
Dllvm.amdgcn.div.fixup.ll8 ; SI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
9 ; SI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1c
10 ; SI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x25
12 ; VI-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x4c
13 ; VI-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x70
14 ; VI-DAG: s_load_dword [[SC:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x94
Dimmv216.ll119 ; GFX9: s_load_dword [[VAL:s[0-9]+]]
124 ; VI-DAG: s_load_dword [[VAL:s[0-9]+]]
140 ; GFX9: s_load_dword [[VAL:s[0-9]+]]
145 ; VI-DAG: s_load_dword [[VAL:s[0-9]+]]
161 ; GFX9: s_load_dword [[VAL:s[0-9]+]]
166 ; VI-DAG: s_load_dword [[VAL:s[0-9]+]]
182 ; GFX9: s_load_dword [[VAL:s[0-9]+]]
187 ; VI-DAG: s_load_dword [[VAL:s[0-9]+]]
203 ; GFX9: s_load_dword [[VAL:s[0-9]+]]
209 ; VI-DAG: s_load_dword [[VAL:s[0-9]+]]
[all …]
Dwiden-smrd-loads.ll5 ; GCN: s_load_dword [[VAL:s[0-9]+]]
17 ; GCN: s_load_dword [[VAL:s[0-9]+]]
31 ; GCN: s_load_dword [[VAL:s[0-9]+]]
45 ; GCN: s_load_dword [[VAL:s[0-9]+]]
58 ; GCN: s_load_dword [[VAL:s[0-9]+]]
72 ; GCN: s_load_dword [[VAL:s[0-9]+]]
107 ; GCN: s_load_dword [[VAL:s[0-9]+]]
117 ; GCN: s_load_dword [[VAL:s[0-9]+]]
131 ; GCN: s_load_dword [[VAL:s[0-9]+]]
144 ; GCN: s_load_dword [[VAL:s[0-9]+]]
[all …]
Dextract_vector_elt-i8.ll5 ; GCN: s_load_dword [[LOAD:s[0-9]+]]
15 ; GCN: s_load_dword s
32 ; GCN: s_load_dword s
48 ; GCN: s_load_dword s
65 ; GCN: s_load_dword [[VAL:s[0-9]+]]
80 ; GCN: s_load_dword [[LOAD0:s[0-9]+]]
98 ; GCN: s_load_dword [[VAL:s[0-9]+]]
114 ; GCN: s_load_dword [[LOAD0:s[0-9]+]]
136 ; VI: s_load_dword [[LOAD:s[0-9]+]], s[4:5], 0x28
137 ; VI-NEXT: s_load_dword [[IDX:s[0-9]+]], s[4:5], 0x4c
[all …]
Dllvm.amdgcn.class.f16.ll27 ; GCN: s_load_dword s[[SA_F16:[0-9]+]]
28 ; GCN: s_load_dword s[[SB_I32:[0-9]+]]
49 ; GCN: s_load_dword s[[SA_F16:[0-9]+]]
50 ; GCN: s_load_dword s[[SB_I32:[0-9]+]]
71 ; GCN: s_load_dword s[[SA_F16:[0-9]+]]
72 ; GCN: s_load_dword s[[SB_I32:[0-9]+]]
94 ; GCN: s_load_dword s[[SA_F16:[0-9]+]]
110 ; GCN: s_load_dword s[[SA_F16:[0-9]+]]
126 ; GCN: s_load_dword s[[SA_F16:[0-9]+]]
143 ; GCN: s_load_dword s[[SA_F16:[0-9]+]]
Drcp-pattern.ll7 ; GCN: s_load_dword [[SRC:s[0-9]+]]
19 ; GCN: s_load_dword [[SRC:s[0-9]+]]
31 ; GCN: s_load_dword [[SRC:s[0-9]+]]
43 ; GCN: s_load_dword [[SRC:s[0-9]+]]
55 ; GCN: s_load_dword [[SRC:s[0-9]+]]
67 ; GCN: s_load_dword [[SRC:s[0-9]+]]
80 ; GCN: s_load_dword [[SRC:s[0-9]+]]
92 ; GCN: s_load_dword [[SRC:s[0-9]+]]
104 ; GCN: s_load_dword [[SRC:s[0-9]+]]
Doperand-spacing.ll7 ; SI: s_load_dword [[SREGA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x1c
8 ; SI: s_load_dword [[SREGB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x13
12 ; VI: s_load_dword [[SREGA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x4c
13 ; VI: s_load_dword [[SREGB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x70
Dimm16.ll127 ; VI: s_load_dword [[VAL:s[0-9]+]]
137 ; VI: s_load_dword [[VAL:s[0-9]+]]
147 ; VI: s_load_dword [[VAL:s[0-9]+]]
157 ; VI: s_load_dword [[VAL:s[0-9]+]]
167 ; VI: s_load_dword [[VAL:s[0-9]+]]
177 ; VI: s_load_dword [[VAL:s[0-9]+]]
187 ; VI: s_load_dword [[VAL:s[0-9]+]]
197 ; VI: s_load_dword [[VAL:s[0-9]+]]
207 ; VI: s_load_dword [[VAL:s[0-9]+]]
239 ; VI: s_load_dword [[VAL:s[0-9]+]]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dsmrd.s14 s_load_dword s1, s[2:3], 0xfc label
18 s_load_dword s1, s[2:3], 0xff label
22 s_load_dword s1, s[2:3], 0x100 label
27 s_load_dword s1, s[2:3], 0xfffff label
32 s_load_dword s1, s[2:3], 0x100000 label
37 s_load_dword s1, s[2:3], 0xffffffff label
46 s_load_dword s1, s[2:3], 1 label
50 s_load_dword s1, s[2:3], s4 label
54 s_load_dword tba_lo, s[2:3], s4 label
58 s_load_dword tba_hi, s[2:3], s4 label
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dsmrd.ll10 ; SICI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x1 ; encoding: [0x01
11 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x4
22 ; SICI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff ; encoding: [0xff,0x{{[0-9]+[137]}}
23 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3fc
35 ; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], s[[OFFSET]] ; encoding: [0x0[[OFFSET]]
36 ; CI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x100
37 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x400
65 ; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]]
66 ; CI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3ffff
67 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xffffc
[all …]
/external/llvm/test/MC/AMDGPU/
Dsmrd.s14 s_load_dword s1, s[2:3], 0xfc label
18 s_load_dword s1, s[2:3], 0xff label
22 s_load_dword s1, s[2:3], 0x100 label
31 s_load_dword s1, s[2:3], 1 label
35 s_load_dword s1, s[2:3], s4 label

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