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Searched refs:s_mov_b64 (Results 1 – 25 of 80) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dreg-syntax-extra.s10 s_mov_b64 [ttmp4,ttmp5], [ttmp2,ttmp3] label
14 s_mov_b64 ttmp[4:5], ttmp[2:3] label
18 s_mov_b64 [s6,s7], s[8:9] label
22 s_mov_b64 s[6:7], [s8,s9] label
26 s_mov_b64 [exec_lo,exec_hi], s[2:3] label
30 s_mov_b64 [flat_scratch_lo,flat_scratch_hi], s[2:3] label
34 s_mov_b64 [vcc_lo,vcc_hi], s[2:3] label
38 s_mov_b64 [tba_lo,tba_hi], s[2:3] label
42 s_mov_b64 [tma_lo,tma_hi], s[2:3] label
Dtrap.s147 s_mov_b64 ttmp[4:5], exec label
152 s_mov_b64 [ttmp4,ttmp5], exec label
157 s_mov_b64 exec, [ttmp4,ttmp5] label
162 s_mov_b64 tba, ttmp[4:5] label
167 s_mov_b64 ttmp[4:5], tba label
172 s_mov_b64 tma, ttmp[4:5] label
177 s_mov_b64 ttmp[4:5], tma label
184 s_mov_b64 ttmp[12:13], exec label
188 s_mov_b64 ttmp[14:15], exec label
Dsop1.s31 s_mov_b64 s[2:3], s[4:5] label
35 s_mov_b64 s[2:3], 0xffffffffffffffff label
39 s_mov_b64 s[2:3], 0xffffffff label
43 s_mov_b64 s[0:1], 0x80000000 label
47 s_mov_b64 s[102:103], -1 label
Dxnack-mask.s8 s_mov_b64 xnack_mask, -1 label
24 s_mov_b64 xnack_mask_lo, -1 label
28 s_mov_b64 xnack_mask_hi, -1 label
Dflat-scratch.s7 s_mov_b64 flat_scratch, -1 label
23 s_mov_b64 flat_scratch_lo, -1 label
28 s_mov_b64 flat_scratch_hi, -1 label
Dsop1-err.s23 s_mov_b64 s1, s[0:1] label
26 s_mov_b64 s[0:1], s1 label
42 s_mov_b64 s[102:103], -1 label
Dout-of-range-registers.s16 s_mov_b64 s[0:17], -1 label
19 s_mov_b64 s[103:104], -1 label
22 s_mov_b64 s[104:105], -1 label
/external/llvm/test/MC/AMDGPU/
Dreg-syntax-extra.s10 s_mov_b64 [ttmp4,ttmp5], [ttmp2,ttmp3] label
14 s_mov_b64 ttmp[4:5], ttmp[2:3] label
18 s_mov_b64 [s6,s7], s[8:9] label
22 s_mov_b64 s[6:7], [s8,s9] label
26 s_mov_b64 [exec_lo,exec_hi], s[2:3] label
30 s_mov_b64 [flat_scratch_lo,flat_scratch_hi], s[2:3] label
34 s_mov_b64 [vcc_lo,vcc_hi], s[2:3] label
38 s_mov_b64 [tba_lo,tba_hi], s[2:3] label
42 s_mov_b64 [tma_lo,tma_hi], s[2:3] label
Dtrap.s101 s_mov_b64 ttmp[4:5], exec label
105 s_mov_b64 [ttmp4,ttmp5], exec label
109 s_mov_b64 exec, [ttmp4,ttmp5] label
113 s_mov_b64 tba, ttmp[4:5] label
117 s_mov_b64 ttmp[4:5], tba label
121 s_mov_b64 tma, ttmp[4:5] label
125 s_mov_b64 ttmp[4:5], tma label
Dsop1-err.s23 s_mov_b64 s1, s[0:1] label
26 s_mov_b64 s[0:1], s1 label
34 s_mov_b64 s[0:1], 0xfffffffff label
37 s_mov_b64 s[0:1], 0x0000000200000000 label
53 s_mov_b64 s[102:103], -1 label
Dsop1.s28 s_mov_b64 s[2:3], s[4:5] label
32 s_mov_b64 s[2:3], 0xffffffffffffffff label
36 s_mov_b64 s[2:3], 0xffffffff label
40 s_mov_b64 s[0:1], 0x80000000 label
44 s_mov_b64 s[102:103], -1 label
Dflat-scratch.s7 s_mov_b64 flat_scratch, -1 label
23 s_mov_b64 flat_scratch_lo, -1 label
28 s_mov_b64 flat_scratch_hi, -1 label
Dout-of-range-registers.s16 s_mov_b64 s[0:17], -1 label
19 s_mov_b64 s[103:104], -1 label
22 s_mov_b64 s[104:105], -1 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dprivate-access-no-objects.ll11 ; OPT-DAG: s_mov_b64 s{{\[}}[[RSRC_LO:[0-9]+]]:{{[0-9]+\]}}, s[0:1]
12 ; OPT-DAG: s_mov_b64 s{{\[[0-9]+}}:[[RSRC_HI:[0-9]+]]{{\]}}, s[2:3]
27 ; OPT-DAG: s_mov_b64 s{{\[}}[[RSRC_LO:[0-9]+]]:{{[0-9]+\]}}, s[0:1]
28 ; OPT-DAG: s_mov_b64 s{{\[[0-9]+}}:[[RSRC_HI:[0-9]+]]{{\]}}, s[2:3]
37 ; OPT-DAG: s_mov_b64 s{{\[}}[[RSRC_LO:[0-9]+]]:{{[0-9]+\]}}, s[0:1]
38 ; OPT-DAG: s_mov_b64 s{{\[[0-9]+}}:[[RSRC_HI:[0-9]+]]{{\]}}, s[2:3]
47 ; OPT-DAG: s_mov_b64 s{{\[}}[[RSRC_LO:[0-9]+]]:{{[0-9]+\]}}, s[0:1]
48 ; OPT-DAG: s_mov_b64 s{{\[[0-9]+}}:[[RSRC_HI:[0-9]+]]{{\]}}, s[2:3]
Dwrite_register.ll16 ; CHECK: s_mov_b64 exec, 0
17 ; CHECK: s_mov_b64 exec, -1
18 ; CHECK: s_mov_b64 exec, s{{\[[0-9]+:[0-9]+\]}}
28 ; CHECK: s_mov_b64 flat_scratch, 0
29 ; CHECK: s_mov_b64 flat_scratch, -1
30 ; CHECK: s_mov_b64 flat_scratch, s{{\[[0-9]+:[0-9]+\]}}
Dcallee-special-input-sgprs.ll17 ; GCN: s_mov_b64 s[6:7], s[4:5]
36 ; GCN: s_mov_b64 s[6:7], s[4:5]
59 ; CIVI: s_mov_b64 s[6:7], s[4:5]
60 ; GFX9-NOT: s_mov_b64
80 ; GCN: s_mov_b64 s[6:7], s[4:5]
101 ; GCN: s_mov_b64 s[6:7], s[4:5]
492 ; GCN: s_mov_b64 s[12:13], s[10:11]
493 ; GCN: s_mov_b64 s[10:11], s[8:9]
494 ; GCN: s_mov_b64 s[8:9], s[6:7]
495 ; GCN: s_mov_b64 s[6:7], s[4:5]
[all …]
Dllvm.amdgcn.implicitarg.ptr.ll62 ; MESA: s_mov_b64 s[8:9], s[6:7]
80 ; MESA: s_mov_b64 s[8:9], s[6:7]
100 ; GCN: s_mov_b64 s[6:7], s[4:5]
111 ; GCN: s_mov_b64 s[6:7], s[4:5]
167 ; MESA: s_mov_b64 s[12:13], s[6:7]
194 ; MESA: s_mov_b64 s[12:13], s[6:7]
220 ; GCN: s_mov_b64 s[6:7], s[4:5]
Dwqm.ll19 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
43 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
65 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
93 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
190 ;CHECK: s_mov_b64 exec, [[ORIG]]
219 ;CHECK: s_mov_b64 exec, [[ORIG]]
248 ;CHECK: s_mov_b64 exec, [[ORIG]]
268 ;CHECK: s_mov_b64 exec, [[ORIG]]
274 ;CHECK: s_mov_b64 exec, [[ORIG2]]
345 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dwrite_register.ll15 ; CHECK: s_mov_b64 exec, 0
16 ; CHECK: s_mov_b64 exec, -1
17 ; CHECK: s_mov_b64 exec, s{{\[[0-9]+:[0-9]+\]}}
26 ; CHECK: s_mov_b64 flat_scratch, 0
27 ; CHECK: s_mov_b64 flat_scratch, -1
28 ; CHECK: s_mov_b64 flat_scratch, s{{\[[0-9]+:[0-9]+\]}}
Dwqm.ll37 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
59 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
84 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
89 ;CHECK: s_mov_b64 exec, [[SAVED]]
116 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
156 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
205 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
252 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
258 ;CHECK: s_mov_b64 exec, [[SAVE]]
281 ;CHECK-NEXT: s_mov_b64 [[ORIG:s\[[0-9]+:[0-9]+\]]], exec
[all …]
/external/llvm/test/MC/Disassembler/AMDGPU/
Dtrap_vi.txt77 # VI: s_mov_b64 ttmp[4:5], exec ; encoding: [0x7e,0x01,0xf4,0xbe]
80 # VI: s_mov_b64 ttmp[4:5], exec ; encoding: [0x7e,0x01,0xf4,0xbe]
83 # VI: s_mov_b64 exec, ttmp[4:5] ; encoding: [0x74,0x01,0xfe,0xbe]
86 # VI: s_mov_b64 tba, ttmp[4:5] ; encoding: [0x74,0x01,0xec,0xbe]
89 # VI: s_mov_b64 ttmp[4:5], tba ; encoding: [0x6c,0x01,0xf4,0xbe]
92 # VI: s_mov_b64 tma, ttmp[4:5] ; encoding: [0x74,0x01,0xee,0xbe]
95 # VI: s_mov_b64 ttmp[4:5], tma ; encoding: [0x6e,0x01,0xf4,0xbe]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dtrap_vi.txt77 # VI: s_mov_b64 ttmp[4:5], exec ; encoding: [0x7e,0x01,0xf4,0xbe]
80 # VI: s_mov_b64 ttmp[4:5], exec ; encoding: [0x7e,0x01,0xf4,0xbe]
83 # VI: s_mov_b64 exec, ttmp[4:5] ; encoding: [0x74,0x01,0xfe,0xbe]
86 # VI: s_mov_b64 tba, ttmp[4:5] ; encoding: [0x74,0x01,0xec,0xbe]
89 # VI: s_mov_b64 ttmp[4:5], tba ; encoding: [0x6c,0x01,0xf4,0xbe]
92 # VI: s_mov_b64 tma, ttmp[4:5] ; encoding: [0x74,0x01,0xee,0xbe]
95 # VI: s_mov_b64 ttmp[4:5], tma ; encoding: [0x6e,0x01,0xf4,0xbe]
/external/clang/test/CodeGenOpenCL/
Damdgcn-flat-scratch-name.cl7 // CHECK: tail call void asm sideeffect "s_mov_b64 flat_scratch, 0", "~{flat_scratch}"()
8 __asm__ volatile("s_mov_b64 flat_scratch, 0" : : : "flat_scratch");
/external/llvm/test/Object/AMDGPU/
Dobjdump.s20 s_mov_b64 s[2:3], exec
21 s_mov_b64 s[10:11], exec
/external/swiftshader/third_party/llvm-7.0/llvm/test/Object/AMDGPU/
Dobjdump.s23 s_mov_b64 s[2:3], exec
24 s_mov_b64 s[10:11], exec

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