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Searched refs:sdtim2 (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/board/ti/ks2_evm/
Dddr3_k2g.c99 .sdtim2 = 0x00001CA5ul,
109 .sdtim2 = 0x00001CC6ul,
160 .sdtim2 = 0x00001CA5ul,
Dddr3_cfg.c43 .sdtim2 = 0x00001D4Aul,
/external/u-boot/arch/arm/mach-keystone/include/mach/
Dddr3.h57 unsigned int sdtim2; member
/external/u-boot/arch/arm/mach-keystone/
Dddr3_spd.c50 debug_ddr_cfg("sdtim2 0x%08X\n", ptr->sdtim2); in dump_emif_config()
383 spd_cb->emif_cfg.sdtim2 = 0x07 << 10 | ((spd->t_rp - 1) & 0x1f) << 5 | in init_ddr3param()
Dddr3.c105 __raw_writel(emif_cfg->sdtim2, base + KS2_DDR3_SDTIM2_OFFSET); in ddr3_init_ddremif()