Searched refs:select_or (Results 1 – 8 of 8) sorted by relevance
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_perfcounter.c | 63 unsigned select_or; member
235 .select_or = S_036700_SQC_BANK_MASK(15) |
512 radeon_emit(cs, selectors[idx] | regs->select_or); in si_pc_emit_select()
525 radeon_emit(cs, selectors[idx] | regs->select_or); in si_pc_emit_select()
536 radeon_emit(cs, selectors[idx] | regs->select_or); in si_pc_emit_select()
546 radeon_set_uconfig_reg(cs, *reg++, selectors[idx] | regs->select_or); in si_pc_emit_select()
563 radeon_emit(cs, selectors[idx] | regs->select_or); in si_pc_emit_select()
574 radeon_emit(cs, selectors[idx - 1] | regs->select_or); in si_pc_emit_select()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | movcc-double.ll | 20 define i32 @select_or(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5) {
23 ; CHECK-LABEL: select_or
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| /external/llvm/test/CodeGen/X86/ |
| D | cmov-double.ll | 21 define i32 @select_or(i32 %a0, i32 %a1, float %a2, float %a3, i32 %a4, i32 %a5) {
24 ; CHECK-LABEL: select_or
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| /external/llvm/test/CodeGen/ARM/ |
| D | movcc-double.ll | 20 define i32 @select_or(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5) {
23 ; CHECK-LABEL: select_or
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | cmov-double.ll | 21 define i32 @select_or(i32 %a0, i32 %a1, float %a2, float %a3, i32 %a4, i32 %a5) {
24 ; CHECK-LABEL: select_or
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| D | select.ll | 1184 define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
1185 ; CHECK-LABEL: select_or:
1193 ; MCU-LABEL: select_or:
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-ccmp.ll | 307 ; CHECK-LABEL: select_or
308 define i64 @select_or(i32 %w0, i32 %w1, i64 %x2, i64 %x3) {
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-ccmp.ll | 308 ; CHECK-LABEL: select_or
309 define i64 @select_or(i32 %w0, i32 %w1, i64 %x2, i64 %x3) {
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