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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
3; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom    | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM
4; RUN: llc < %s -mtriple=i386-intel-elfiamcu                 | FileCheck %s --check-prefix=MCU
5
6; PR5757
7%0 = type { i64, i32 }
8
9define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind {
10; CHECK-LABEL: test1:
11; CHECK:       ## %bb.0:
12; CHECK-NEXT:    addq $8, %rdi
13; CHECK-NEXT:    addq $8, %rsi
14; CHECK-NEXT:    testb $1, %dl
15; CHECK-NEXT:    cmovneq %rdi, %rsi
16; CHECK-NEXT:    movl (%rsi), %eax
17; CHECK-NEXT:    retq
18;
19; MCU-LABEL: test1:
20; MCU:       # %bb.0:
21; MCU-NEXT:    testb $1, %cl
22; MCU-NEXT:    jne .LBB0_1
23; MCU-NEXT:  # %bb.2:
24; MCU-NEXT:    addl $8, %edx
25; MCU-NEXT:    movl (%edx), %eax
26; MCU-NEXT:    retl
27; MCU-NEXT:  .LBB0_1:
28; MCU-NEXT:    addl $8, %eax
29; MCU-NEXT:    movl (%eax), %eax
30; MCU-NEXT:    retl
31  %t0 = load %0, %0* %p
32  %t1 = load %0, %0* %q
33  %t4 = select i1 %r, %0 %t0, %0 %t1
34  %t5 = extractvalue %0 %t4, 1
35  ret i32 %t5
36}
37
38; PR2139
39define i32 @test2() nounwind {
40; GENERIC-LABEL: test2:
41; GENERIC:       ## %bb.0: ## %entry
42; GENERIC-NEXT:    pushq %rax
43; GENERIC-NEXT:    callq _return_false
44; GENERIC-NEXT:    xorl %ecx, %ecx
45; GENERIC-NEXT:    testb $1, %al
46; GENERIC-NEXT:    movl $-480, %eax ## imm = 0xFE20
47; GENERIC-NEXT:    cmovnel %ecx, %eax
48; GENERIC-NEXT:    shll $3, %eax
49; GENERIC-NEXT:    cmpl $32768, %eax ## imm = 0x8000
50; GENERIC-NEXT:    jge LBB1_1
51; GENERIC-NEXT:  ## %bb.2: ## %bb91
52; GENERIC-NEXT:    xorl %eax, %eax
53; GENERIC-NEXT:    popq %rcx
54; GENERIC-NEXT:    retq
55; GENERIC-NEXT:  LBB1_1: ## %bb90
56;
57; ATOM-LABEL: test2:
58; ATOM:       ## %bb.0: ## %entry
59; ATOM-NEXT:    pushq %rax
60; ATOM-NEXT:    callq _return_false
61; ATOM-NEXT:    xorl %ecx, %ecx
62; ATOM-NEXT:    movl $-480, %edx ## imm = 0xFE20
63; ATOM-NEXT:    testb $1, %al
64; ATOM-NEXT:    cmovnel %ecx, %edx
65; ATOM-NEXT:    shll $3, %edx
66; ATOM-NEXT:    cmpl $32768, %edx ## imm = 0x8000
67; ATOM-NEXT:    jge LBB1_1
68; ATOM-NEXT:  ## %bb.2: ## %bb91
69; ATOM-NEXT:    xorl %eax, %eax
70; ATOM-NEXT:    popq %rcx
71; ATOM-NEXT:    retq
72; ATOM-NEXT:  LBB1_1: ## %bb90
73;
74; MCU-LABEL: test2:
75; MCU:       # %bb.0: # %entry
76; MCU-NEXT:    calll return_false
77; MCU-NEXT:    xorl %ecx, %ecx
78; MCU-NEXT:    testb $1, %al
79; MCU-NEXT:    jne .LBB1_2
80; MCU-NEXT:  # %bb.1: # %entry
81; MCU-NEXT:    movl $-480, %ecx # imm = 0xFE20
82; MCU-NEXT:  .LBB1_2: # %entry
83; MCU-NEXT:    shll $3, %ecx
84; MCU-NEXT:    cmpl $32768, %ecx # imm = 0x8000
85; MCU-NEXT:    jge .LBB1_3
86; MCU-NEXT:  # %bb.4: # %bb91
87; MCU-NEXT:    xorl %eax, %eax
88; MCU-NEXT:    retl
89; MCU-NEXT:  .LBB1_3: # %bb90
90entry:
91  %tmp73 = tail call i1 @return_false()
92  %g.0 = select i1 %tmp73, i16 0, i16 -480
93  %tmp7778 = sext i16 %g.0 to i32
94  %tmp80 = shl i32 %tmp7778, 3
95  %tmp87 = icmp sgt i32 %tmp80, 32767
96  br i1 %tmp87, label %bb90, label %bb91
97bb90:
98  unreachable
99bb91:
100  ret i32 0
101}
102
103declare i1 @return_false()
104
105;; Select between two floating point constants.
106define float @test3(i32 %x) nounwind readnone {
107; GENERIC-LABEL: test3:
108; GENERIC:       ## %bb.0: ## %entry
109; GENERIC-NEXT:    xorl %eax, %eax
110; GENERIC-NEXT:    testl %edi, %edi
111; GENERIC-NEXT:    sete %al
112; GENERIC-NEXT:    leaq {{.*}}(%rip), %rcx
113; GENERIC-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
114; GENERIC-NEXT:    retq
115;
116; ATOM-LABEL: test3:
117; ATOM:       ## %bb.0: ## %entry
118; ATOM-NEXT:    xorl %eax, %eax
119; ATOM-NEXT:    leaq {{.*}}(%rip), %rcx
120; ATOM-NEXT:    testl %edi, %edi
121; ATOM-NEXT:    sete %al
122; ATOM-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
123; ATOM-NEXT:    retq
124;
125; MCU-LABEL: test3:
126; MCU:       # %bb.0: # %entry
127; MCU-NEXT:    xorl %ecx, %ecx
128; MCU-NEXT:    testl %eax, %eax
129; MCU-NEXT:    sete %cl
130; MCU-NEXT:    flds {{\.LCPI.*}}(,%ecx,4)
131; MCU-NEXT:    retl
132entry:
133  %0 = icmp eq i32 %x, 0
134  %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01
135  ret float %iftmp.0.0
136}
137
138define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly {
139; CHECK-LABEL: test4:
140; CHECK:       ## %bb.0: ## %entry
141; CHECK-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
142; CHECK-NEXT:    xorl %eax, %eax
143; CHECK-NEXT:    ucomisd %xmm0, %xmm1
144; CHECK-NEXT:    seta %al
145; CHECK-NEXT:    movsbl (%rdi,%rax,4), %eax
146; CHECK-NEXT:    retq
147;
148; MCU-LABEL: test4:
149; MCU:       # %bb.0: # %entry
150; MCU-NEXT:    movl %eax, %ecx
151; MCU-NEXT:    fldl {{[0-9]+}}(%esp)
152; MCU-NEXT:    flds {{\.LCPI.*}}
153; MCU-NEXT:    fucompp
154; MCU-NEXT:    fnstsw %ax
155; MCU-NEXT:    xorl %edx, %edx
156; MCU-NEXT:    # kill: def $ah killed $ah killed $ax
157; MCU-NEXT:    sahf
158; MCU-NEXT:    seta %dl
159; MCU-NEXT:    movb (%ecx,%edx,4), %al
160; MCU-NEXT:    retl
161entry:
162  %0 = fcmp olt double %F, 4.200000e+01
163  %iftmp.0.0 = select i1 %0, i32 4, i32 0
164  %1 = getelementptr i8, i8* %P, i32 %iftmp.0.0
165  %2 = load i8, i8* %1, align 1
166  ret i8 %2
167}
168
169define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind {
170; CHECK-LABEL: test5:
171; CHECK:       ## %bb.0:
172; CHECK-NEXT:    testb $1, %dil
173; CHECK-NEXT:    jne LBB4_2
174; CHECK-NEXT:  ## %bb.1:
175; CHECK-NEXT:    movdqa %xmm1, %xmm0
176; CHECK-NEXT:  LBB4_2:
177; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
178; CHECK-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
179; CHECK-NEXT:    movd %xmm0, (%rsi)
180; CHECK-NEXT:    retq
181;
182; MCU-LABEL: test5:
183; MCU:       # %bb.0:
184; MCU-NEXT:    pushl %esi
185; MCU-NEXT:    movl {{[0-9]+}}(%esp), %esi
186; MCU-NEXT:    testb $1, %al
187; MCU-NEXT:    jne .LBB4_2
188; MCU-NEXT:  # %bb.1:
189; MCU-NEXT:    movzwl {{[0-9]+}}(%esp), %ecx
190; MCU-NEXT:    movzwl {{[0-9]+}}(%esp), %edx
191; MCU-NEXT:  .LBB4_2:
192; MCU-NEXT:    movw %cx, 2(%esi)
193; MCU-NEXT:    movw %dx, (%esi)
194; MCU-NEXT:    popl %esi
195; MCU-NEXT:    retl
196  %x = select i1 %c, <2 x i16> %a, <2 x i16> %b
197  store <2 x i16> %x, <2 x i16>* %p
198  ret void
199}
200
201; Verify that the fmul gets sunk into the one part of the diamond where it is needed.
202define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind {
203; CHECK-LABEL: test6:
204; CHECK:       ## %bb.0:
205; CHECK-NEXT:    testl %edi, %edi
206; CHECK-NEXT:    je LBB5_1
207; CHECK-NEXT:  ## %bb.2:
208; CHECK-NEXT:    movaps (%rsi), %xmm0
209; CHECK-NEXT:    movaps %xmm0, (%rsi)
210; CHECK-NEXT:    retq
211; CHECK-NEXT:  LBB5_1:
212; CHECK-NEXT:    movaps (%rdx), %xmm0
213; CHECK-NEXT:    mulps %xmm0, %xmm0
214; CHECK-NEXT:    movaps %xmm0, (%rsi)
215; CHECK-NEXT:    retq
216;
217; MCU-LABEL: test6:
218; MCU:       # %bb.0:
219; MCU-NEXT:    pushl %eax
220; MCU-NEXT:    flds 12(%edx)
221; MCU-NEXT:    fstps (%esp) # 4-byte Folded Spill
222; MCU-NEXT:    flds 8(%edx)
223; MCU-NEXT:    flds 4(%edx)
224; MCU-NEXT:    flds (%ecx)
225; MCU-NEXT:    flds 4(%ecx)
226; MCU-NEXT:    flds 8(%ecx)
227; MCU-NEXT:    flds 12(%ecx)
228; MCU-NEXT:    fmul %st(0), %st(0)
229; MCU-NEXT:    fxch %st(1)
230; MCU-NEXT:    fmul %st(0), %st(0)
231; MCU-NEXT:    fxch %st(2)
232; MCU-NEXT:    fmul %st(0), %st(0)
233; MCU-NEXT:    fxch %st(3)
234; MCU-NEXT:    fmul %st(0), %st(0)
235; MCU-NEXT:    testl %eax, %eax
236; MCU-NEXT:    flds (%edx)
237; MCU-NEXT:    je .LBB5_2
238; MCU-NEXT:  # %bb.1:
239; MCU-NEXT:    fstp %st(1)
240; MCU-NEXT:    fstp %st(3)
241; MCU-NEXT:    fstp %st(1)
242; MCU-NEXT:    fstp %st(0)
243; MCU-NEXT:    flds (%esp) # 4-byte Folded Reload
244; MCU-NEXT:    fldz
245; MCU-NEXT:    fldz
246; MCU-NEXT:    fldz
247; MCU-NEXT:    fxch %st(1)
248; MCU-NEXT:    fxch %st(6)
249; MCU-NEXT:    fxch %st(1)
250; MCU-NEXT:    fxch %st(5)
251; MCU-NEXT:    fxch %st(4)
252; MCU-NEXT:    fxch %st(1)
253; MCU-NEXT:    fxch %st(3)
254; MCU-NEXT:    fxch %st(2)
255; MCU-NEXT:  .LBB5_2:
256; MCU-NEXT:    fstp %st(0)
257; MCU-NEXT:    fstp %st(5)
258; MCU-NEXT:    fstp %st(3)
259; MCU-NEXT:    fxch %st(2)
260; MCU-NEXT:    fstps 12(%edx)
261; MCU-NEXT:    fxch %st(1)
262; MCU-NEXT:    fstps 8(%edx)
263; MCU-NEXT:    fstps 4(%edx)
264; MCU-NEXT:    fstps (%edx)
265; MCU-NEXT:    popl %eax
266; MCU-NEXT:    retl
267  %tmp = load <4 x float>, <4 x float>* %A
268  %tmp3 = load <4 x float>, <4 x float>* %B
269  %tmp9 = fmul <4 x float> %tmp3, %tmp3
270  %tmp.upgrd.1 = icmp eq i32 %C, 0
271  %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp
272  store <4 x float> %iftmp.38.0, <4 x float>* %A
273  ret void
274}
275
276; Select with fp80's
277define x86_fp80 @test7(i32 %tmp8) nounwind {
278; GENERIC-LABEL: test7:
279; GENERIC:       ## %bb.0:
280; GENERIC-NEXT:    xorl %eax, %eax
281; GENERIC-NEXT:    testl %edi, %edi
282; GENERIC-NEXT:    setns %al
283; GENERIC-NEXT:    shlq $4, %rax
284; GENERIC-NEXT:    leaq {{.*}}(%rip), %rcx
285; GENERIC-NEXT:    fldt (%rax,%rcx)
286; GENERIC-NEXT:    retq
287;
288; ATOM-LABEL: test7:
289; ATOM:       ## %bb.0:
290; ATOM-NEXT:    xorl %eax, %eax
291; ATOM-NEXT:    leaq {{.*}}(%rip), %rcx
292; ATOM-NEXT:    testl %edi, %edi
293; ATOM-NEXT:    setns %al
294; ATOM-NEXT:    shlq $4, %rax
295; ATOM-NEXT:    fldt (%rax,%rcx)
296; ATOM-NEXT:    retq
297;
298; MCU-LABEL: test7:
299; MCU:       # %bb.0:
300; MCU-NEXT:    notl %eax
301; MCU-NEXT:    shrl $27, %eax
302; MCU-NEXT:    andl $-16, %eax
303; MCU-NEXT:    fldt {{\.LCPI.*}}(%eax)
304; MCU-NEXT:    retl
305  %tmp9 = icmp sgt i32 %tmp8, -1
306  %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000
307  ret x86_fp80 %retval
308}
309
310; widening select v6i32 and then a sub
311define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
312; GENERIC-LABEL: test8:
313; GENERIC:       ## %bb.0:
314; GENERIC-NEXT:    testb $1, %dil
315; GENERIC-NEXT:    jne LBB7_1
316; GENERIC-NEXT:  ## %bb.2:
317; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
318; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
319; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
320; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
321; GENERIC-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
322; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
323; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
324; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
325; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
326; GENERIC-NEXT:    jmp LBB7_3
327; GENERIC-NEXT:  LBB7_1:
328; GENERIC-NEXT:    movd %r9d, %xmm0
329; GENERIC-NEXT:    movd %r8d, %xmm1
330; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
331; GENERIC-NEXT:    movd %ecx, %xmm2
332; GENERIC-NEXT:    movd %edx, %xmm0
333; GENERIC-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
334; GENERIC-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
335; GENERIC-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
336; GENERIC-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
337; GENERIC-NEXT:  LBB7_3:
338; GENERIC-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
339; GENERIC-NEXT:    pcmpeqd %xmm2, %xmm2
340; GENERIC-NEXT:    paddd %xmm2, %xmm0
341; GENERIC-NEXT:    paddd %xmm2, %xmm1
342; GENERIC-NEXT:    movq %xmm1, 16(%rsi)
343; GENERIC-NEXT:    movdqa %xmm0, (%rsi)
344; GENERIC-NEXT:    retq
345;
346; ATOM-LABEL: test8:
347; ATOM:       ## %bb.0:
348; ATOM-NEXT:    testb $1, %dil
349; ATOM-NEXT:    jne LBB7_1
350; ATOM-NEXT:  ## %bb.2:
351; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
352; ATOM-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
353; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
354; ATOM-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
355; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
356; ATOM-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
357; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
358; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
359; ATOM-NEXT:    jmp LBB7_3
360; ATOM-NEXT:  LBB7_1:
361; ATOM-NEXT:    movd %r9d, %xmm1
362; ATOM-NEXT:    movd %r8d, %xmm2
363; ATOM-NEXT:    movd %ecx, %xmm3
364; ATOM-NEXT:    movd %edx, %xmm0
365; ATOM-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
366; ATOM-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
367; ATOM-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
368; ATOM-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
369; ATOM-NEXT:  LBB7_3:
370; ATOM-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
371; ATOM-NEXT:    pcmpeqd %xmm2, %xmm2
372; ATOM-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
373; ATOM-NEXT:    paddd %xmm2, %xmm0
374; ATOM-NEXT:    paddd %xmm2, %xmm1
375; ATOM-NEXT:    movq %xmm1, 16(%rsi)
376; ATOM-NEXT:    movdqa %xmm0, (%rsi)
377; ATOM-NEXT:    retq
378;
379; MCU-LABEL: test8:
380; MCU:       # %bb.0:
381; MCU-NEXT:    pushl %ebp
382; MCU-NEXT:    pushl %ebx
383; MCU-NEXT:    pushl %edi
384; MCU-NEXT:    pushl %esi
385; MCU-NEXT:    testb $1, %al
386; MCU-NEXT:    jne .LBB7_1
387; MCU-NEXT:  # %bb.2:
388; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
389; MCU-NEXT:    movl (%eax), %eax
390; MCU-NEXT:    je .LBB7_5
391; MCU-NEXT:  .LBB7_4:
392; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
393; MCU-NEXT:    movl (%ecx), %ecx
394; MCU-NEXT:    je .LBB7_8
395; MCU-NEXT:  .LBB7_7:
396; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
397; MCU-NEXT:    movl (%esi), %esi
398; MCU-NEXT:    je .LBB7_11
399; MCU-NEXT:  .LBB7_10:
400; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
401; MCU-NEXT:    movl (%edi), %edi
402; MCU-NEXT:    je .LBB7_14
403; MCU-NEXT:  .LBB7_13:
404; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebx
405; MCU-NEXT:    movl (%ebx), %ebx
406; MCU-NEXT:    je .LBB7_17
407; MCU-NEXT:  .LBB7_16:
408; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
409; MCU-NEXT:    jmp .LBB7_18
410; MCU-NEXT:  .LBB7_1:
411; MCU-NEXT:    leal {{[0-9]+}}(%esp), %eax
412; MCU-NEXT:    movl (%eax), %eax
413; MCU-NEXT:    jne .LBB7_4
414; MCU-NEXT:  .LBB7_5:
415; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ecx
416; MCU-NEXT:    movl (%ecx), %ecx
417; MCU-NEXT:    jne .LBB7_7
418; MCU-NEXT:  .LBB7_8:
419; MCU-NEXT:    leal {{[0-9]+}}(%esp), %esi
420; MCU-NEXT:    movl (%esi), %esi
421; MCU-NEXT:    jne .LBB7_10
422; MCU-NEXT:  .LBB7_11:
423; MCU-NEXT:    leal {{[0-9]+}}(%esp), %edi
424; MCU-NEXT:    movl (%edi), %edi
425; MCU-NEXT:    jne .LBB7_13
426; MCU-NEXT:  .LBB7_14:
427; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebx
428; MCU-NEXT:    movl (%ebx), %ebx
429; MCU-NEXT:    jne .LBB7_16
430; MCU-NEXT:  .LBB7_17:
431; MCU-NEXT:    leal {{[0-9]+}}(%esp), %ebp
432; MCU-NEXT:  .LBB7_18:
433; MCU-NEXT:    movl (%ebp), %ebp
434; MCU-NEXT:    decl %ebp
435; MCU-NEXT:    decl %ebx
436; MCU-NEXT:    decl %edi
437; MCU-NEXT:    decl %esi
438; MCU-NEXT:    decl %ecx
439; MCU-NEXT:    decl %eax
440; MCU-NEXT:    movl %eax, 20(%edx)
441; MCU-NEXT:    movl %ecx, 16(%edx)
442; MCU-NEXT:    movl %esi, 12(%edx)
443; MCU-NEXT:    movl %edi, 8(%edx)
444; MCU-NEXT:    movl %ebx, 4(%edx)
445; MCU-NEXT:    movl %ebp, (%edx)
446; MCU-NEXT:    popl %esi
447; MCU-NEXT:    popl %edi
448; MCU-NEXT:    popl %ebx
449; MCU-NEXT:    popl %ebp
450; MCU-NEXT:    retl
451  %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
452  %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
453  store <6 x i32> %val, <6 x i32>* %dst.addr
454  ret void
455}
456
457
458;; Test integer select between values and constants.
459
460define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone {
461; GENERIC-LABEL: test9:
462; GENERIC:       ## %bb.0:
463; GENERIC-NEXT:    cmpq $1, %rdi
464; GENERIC-NEXT:    sbbq %rax, %rax
465; GENERIC-NEXT:    orq %rsi, %rax
466; GENERIC-NEXT:    retq
467;
468; ATOM-LABEL: test9:
469; ATOM:       ## %bb.0:
470; ATOM-NEXT:    cmpq $1, %rdi
471; ATOM-NEXT:    sbbq %rax, %rax
472; ATOM-NEXT:    orq %rsi, %rax
473; ATOM-NEXT:    nop
474; ATOM-NEXT:    nop
475; ATOM-NEXT:    retq
476;
477; MCU-LABEL: test9:
478; MCU:       # %bb.0:
479; MCU-NEXT:    orl %edx, %eax
480; MCU-NEXT:    jne .LBB8_1
481; MCU-NEXT:  # %bb.2:
482; MCU-NEXT:    movl $-1, %eax
483; MCU-NEXT:    movl $-1, %edx
484; MCU-NEXT:    retl
485; MCU-NEXT:  .LBB8_1:
486; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
487; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
488; MCU-NEXT:    retl
489  %cmp = icmp ne i64 %x, 0
490  %cond = select i1 %cmp, i64 %y, i64 -1
491  ret i64 %cond
492}
493
494;; Same as test9
495define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
496; GENERIC-LABEL: test9a:
497; GENERIC:       ## %bb.0:
498; GENERIC-NEXT:    cmpq $1, %rdi
499; GENERIC-NEXT:    sbbq %rax, %rax
500; GENERIC-NEXT:    orq %rsi, %rax
501; GENERIC-NEXT:    retq
502;
503; ATOM-LABEL: test9a:
504; ATOM:       ## %bb.0:
505; ATOM-NEXT:    cmpq $1, %rdi
506; ATOM-NEXT:    sbbq %rax, %rax
507; ATOM-NEXT:    orq %rsi, %rax
508; ATOM-NEXT:    nop
509; ATOM-NEXT:    nop
510; ATOM-NEXT:    retq
511;
512; MCU-LABEL: test9a:
513; MCU:       # %bb.0:
514; MCU-NEXT:    orl %edx, %eax
515; MCU-NEXT:    movl $-1, %eax
516; MCU-NEXT:    movl $-1, %edx
517; MCU-NEXT:    je .LBB9_2
518; MCU-NEXT:  # %bb.1:
519; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
520; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
521; MCU-NEXT:  .LBB9_2:
522; MCU-NEXT:    retl
523  %cmp = icmp eq i64 %x, 0
524  %cond = select i1 %cmp, i64 -1, i64 %y
525  ret i64 %cond
526}
527
528define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone {
529; GENERIC-LABEL: test9b:
530; GENERIC:       ## %bb.0:
531; GENERIC-NEXT:    cmpq $1, %rdi
532; GENERIC-NEXT:    sbbq %rax, %rax
533; GENERIC-NEXT:    orq %rsi, %rax
534; GENERIC-NEXT:    retq
535;
536; ATOM-LABEL: test9b:
537; ATOM:       ## %bb.0:
538; ATOM-NEXT:    cmpq $1, %rdi
539; ATOM-NEXT:    sbbq %rax, %rax
540; ATOM-NEXT:    orq %rsi, %rax
541; ATOM-NEXT:    nop
542; ATOM-NEXT:    nop
543; ATOM-NEXT:    retq
544;
545; MCU-LABEL: test9b:
546; MCU:       # %bb.0:
547; MCU-NEXT:    movl %edx, %ecx
548; MCU-NEXT:    xorl %edx, %edx
549; MCU-NEXT:    orl %ecx, %eax
550; MCU-NEXT:    sete %dl
551; MCU-NEXT:    negl %edx
552; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
553; MCU-NEXT:    orl %edx, %eax
554; MCU-NEXT:    orl {{[0-9]+}}(%esp), %edx
555; MCU-NEXT:    retl
556  %cmp = icmp eq i64 %x, 0
557  %A = sext i1 %cmp to i64
558  %cond = or i64 %y, %A
559  ret i64 %cond
560}
561
562;; Select between -1 and 1.
563define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone {
564; CHECK-LABEL: test10:
565; CHECK:       ## %bb.0:
566; CHECK-NEXT:    xorl %eax, %eax
567; CHECK-NEXT:    testq %rdi, %rdi
568; CHECK-NEXT:    setne %al
569; CHECK-NEXT:    leaq -1(%rax,%rax), %rax
570; CHECK-NEXT:    retq
571;
572; MCU-LABEL: test10:
573; MCU:       # %bb.0:
574; MCU-NEXT:    orl %edx, %eax
575; MCU-NEXT:    movl $-1, %eax
576; MCU-NEXT:    movl $-1, %edx
577; MCU-NEXT:    je .LBB11_2
578; MCU-NEXT:  # %bb.1:
579; MCU-NEXT:    xorl %edx, %edx
580; MCU-NEXT:    movl $1, %eax
581; MCU-NEXT:  .LBB11_2:
582; MCU-NEXT:    retl
583  %cmp = icmp eq i64 %x, 0
584  %cond = select i1 %cmp, i64 -1, i64 1
585  ret i64 %cond
586}
587
588define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone {
589; CHECK-LABEL: test11:
590; CHECK:       ## %bb.0:
591; CHECK-NEXT:    cmpq $1, %rdi
592; CHECK-NEXT:    sbbq %rax, %rax
593; CHECK-NEXT:    notq %rax
594; CHECK-NEXT:    orq %rsi, %rax
595; CHECK-NEXT:    retq
596;
597; MCU-LABEL: test11:
598; MCU:       # %bb.0:
599; MCU-NEXT:    orl %edx, %eax
600; MCU-NEXT:    je .LBB12_1
601; MCU-NEXT:  # %bb.2:
602; MCU-NEXT:    movl $-1, %eax
603; MCU-NEXT:    movl $-1, %edx
604; MCU-NEXT:    retl
605; MCU-NEXT:  .LBB12_1:
606; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
607; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
608; MCU-NEXT:    retl
609  %cmp = icmp eq i64 %x, 0
610  %cond = select i1 %cmp, i64 %y, i64 -1
611  ret i64 %cond
612}
613
614define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
615; CHECK-LABEL: test11a:
616; CHECK:       ## %bb.0:
617; CHECK-NEXT:    cmpq $1, %rdi
618; CHECK-NEXT:    sbbq %rax, %rax
619; CHECK-NEXT:    notq %rax
620; CHECK-NEXT:    orq %rsi, %rax
621; CHECK-NEXT:    retq
622;
623; MCU-LABEL: test11a:
624; MCU:       # %bb.0:
625; MCU-NEXT:    orl %edx, %eax
626; MCU-NEXT:    movl $-1, %eax
627; MCU-NEXT:    movl $-1, %edx
628; MCU-NEXT:    jne .LBB13_2
629; MCU-NEXT:  # %bb.1:
630; MCU-NEXT:    movl {{[0-9]+}}(%esp), %eax
631; MCU-NEXT:    movl {{[0-9]+}}(%esp), %edx
632; MCU-NEXT:  .LBB13_2:
633; MCU-NEXT:    retl
634  %cmp = icmp ne i64 %x, 0
635  %cond = select i1 %cmp, i64 -1, i64 %y
636  ret i64 %cond
637}
638
639
640declare noalias i8* @_Znam(i64) noredzone
641
642define noalias i8* @test12(i64 %count) nounwind ssp noredzone {
643; GENERIC-LABEL: test12:
644; GENERIC:       ## %bb.0: ## %entry
645; GENERIC-NEXT:    movl $4, %ecx
646; GENERIC-NEXT:    movq %rdi, %rax
647; GENERIC-NEXT:    mulq %rcx
648; GENERIC-NEXT:    movq $-1, %rdi
649; GENERIC-NEXT:    cmovnoq %rax, %rdi
650; GENERIC-NEXT:    jmp __Znam ## TAILCALL
651;
652; ATOM-LABEL: test12:
653; ATOM:       ## %bb.0: ## %entry
654; ATOM-NEXT:    movq %rdi, %rax
655; ATOM-NEXT:    movl $4, %ecx
656; ATOM-NEXT:    movq $-1, %rdi
657; ATOM-NEXT:    mulq %rcx
658; ATOM-NEXT:    cmovnoq %rax, %rdi
659; ATOM-NEXT:    jmp __Znam ## TAILCALL
660;
661; MCU-LABEL: test12:
662; MCU:       # %bb.0: # %entry
663; MCU-NEXT:    pushl %ebp
664; MCU-NEXT:    pushl %ebx
665; MCU-NEXT:    pushl %edi
666; MCU-NEXT:    pushl %esi
667; MCU-NEXT:    movl %edx, %ebx
668; MCU-NEXT:    movl %eax, %ebp
669; MCU-NEXT:    movl $4, %ecx
670; MCU-NEXT:    mull %ecx
671; MCU-NEXT:    movl %eax, %esi
672; MCU-NEXT:    leal (%edx,%ebx,4), %edi
673; MCU-NEXT:    movl %edi, %edx
674; MCU-NEXT:    pushl $0
675; MCU-NEXT:    pushl $4
676; MCU-NEXT:    calll __udivdi3
677; MCU-NEXT:    addl $8, %esp
678; MCU-NEXT:    xorl %ebx, %edx
679; MCU-NEXT:    xorl %ebp, %eax
680; MCU-NEXT:    orl %edx, %eax
681; MCU-NEXT:    movl $-1, %eax
682; MCU-NEXT:    movl $-1, %edx
683; MCU-NEXT:    jne .LBB14_2
684; MCU-NEXT:  # %bb.1: # %entry
685; MCU-NEXT:    movl %esi, %eax
686; MCU-NEXT:    movl %edi, %edx
687; MCU-NEXT:  .LBB14_2: # %entry
688; MCU-NEXT:    popl %esi
689; MCU-NEXT:    popl %edi
690; MCU-NEXT:    popl %ebx
691; MCU-NEXT:    popl %ebp
692; MCU-NEXT:    jmp _Znam # TAILCALL
693entry:
694  %A = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %count, i64 4)
695  %B = extractvalue { i64, i1 } %A, 1
696  %C = extractvalue { i64, i1 } %A, 0
697  %D = select i1 %B, i64 -1, i64 %C
698  %call = tail call noalias i8* @_Znam(i64 %D) nounwind noredzone
699  ret i8* %call
700}
701
702declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone
703
704define i32 @test13(i32 %a, i32 %b) nounwind {
705; GENERIC-LABEL: test13:
706; GENERIC:       ## %bb.0:
707; GENERIC-NEXT:    cmpl %esi, %edi
708; GENERIC-NEXT:    sbbl %eax, %eax
709; GENERIC-NEXT:    retq
710;
711; ATOM-LABEL: test13:
712; ATOM:       ## %bb.0:
713; ATOM-NEXT:    cmpl %esi, %edi
714; ATOM-NEXT:    sbbl %eax, %eax
715; ATOM-NEXT:    nop
716; ATOM-NEXT:    nop
717; ATOM-NEXT:    nop
718; ATOM-NEXT:    nop
719; ATOM-NEXT:    retq
720;
721; MCU-LABEL: test13:
722; MCU:       # %bb.0:
723; MCU-NEXT:    cmpl %edx, %eax
724; MCU-NEXT:    sbbl %eax, %eax
725; MCU-NEXT:    retl
726  %c = icmp ult i32 %a, %b
727  %d = sext i1 %c to i32
728  ret i32 %d
729}
730
731define i32 @test14(i32 %a, i32 %b) nounwind {
732; CHECK-LABEL: test14:
733; CHECK:       ## %bb.0:
734; CHECK-NEXT:    xorl %eax, %eax
735; CHECK-NEXT:    cmpl %esi, %edi
736; CHECK-NEXT:    setae %al
737; CHECK-NEXT:    negl %eax
738; CHECK-NEXT:    retq
739;
740; MCU-LABEL: test14:
741; MCU:       # %bb.0:
742; MCU-NEXT:    xorl %ecx, %ecx
743; MCU-NEXT:    cmpl %edx, %eax
744; MCU-NEXT:    setae %cl
745; MCU-NEXT:    negl %ecx
746; MCU-NEXT:    movl %ecx, %eax
747; MCU-NEXT:    retl
748  %c = icmp uge i32 %a, %b
749  %d = sext i1 %c to i32
750  ret i32 %d
751}
752
753; rdar://10961709
754define i32 @test15(i32 %x) nounwind {
755; GENERIC-LABEL: test15:
756; GENERIC:       ## %bb.0: ## %entry
757; GENERIC-NEXT:    negl %edi
758; GENERIC-NEXT:    sbbl %eax, %eax
759; GENERIC-NEXT:    retq
760;
761; ATOM-LABEL: test15:
762; ATOM:       ## %bb.0: ## %entry
763; ATOM-NEXT:    negl %edi
764; ATOM-NEXT:    sbbl %eax, %eax
765; ATOM-NEXT:    nop
766; ATOM-NEXT:    nop
767; ATOM-NEXT:    nop
768; ATOM-NEXT:    nop
769; ATOM-NEXT:    retq
770;
771; MCU-LABEL: test15:
772; MCU:       # %bb.0: # %entry
773; MCU-NEXT:    negl %eax
774; MCU-NEXT:    sbbl %eax, %eax
775; MCU-NEXT:    retl
776entry:
777  %cmp = icmp ne i32 %x, 0
778  %sub = sext i1 %cmp to i32
779  ret i32 %sub
780}
781
782define i64 @test16(i64 %x) nounwind uwtable readnone ssp {
783; GENERIC-LABEL: test16:
784; GENERIC:       ## %bb.0: ## %entry
785; GENERIC-NEXT:    negq %rdi
786; GENERIC-NEXT:    sbbq %rax, %rax
787; GENERIC-NEXT:    retq
788;
789; ATOM-LABEL: test16:
790; ATOM:       ## %bb.0: ## %entry
791; ATOM-NEXT:    negq %rdi
792; ATOM-NEXT:    sbbq %rax, %rax
793; ATOM-NEXT:    nop
794; ATOM-NEXT:    nop
795; ATOM-NEXT:    nop
796; ATOM-NEXT:    nop
797; ATOM-NEXT:    retq
798;
799; MCU-LABEL: test16:
800; MCU:       # %bb.0: # %entry
801; MCU-NEXT:    movl %eax, %ecx
802; MCU-NEXT:    xorl %eax, %eax
803; MCU-NEXT:    orl %edx, %ecx
804; MCU-NEXT:    setne %al
805; MCU-NEXT:    negl %eax
806; MCU-NEXT:    movl %eax, %edx
807; MCU-NEXT:    retl
808entry:
809  %cmp = icmp ne i64 %x, 0
810  %conv1 = sext i1 %cmp to i64
811  ret i64 %conv1
812}
813
814define i16 @test17(i16 %x) nounwind {
815; GENERIC-LABEL: test17:
816; GENERIC:       ## %bb.0: ## %entry
817; GENERIC-NEXT:    negw %di
818; GENERIC-NEXT:    sbbl %eax, %eax
819; GENERIC-NEXT:    ## kill: def $ax killed $ax killed $eax
820; GENERIC-NEXT:    retq
821;
822; ATOM-LABEL: test17:
823; ATOM:       ## %bb.0: ## %entry
824; ATOM-NEXT:    negw %di
825; ATOM-NEXT:    sbbl %eax, %eax
826; ATOM-NEXT:    ## kill: def $ax killed $ax killed $eax
827; ATOM-NEXT:    nop
828; ATOM-NEXT:    nop
829; ATOM-NEXT:    nop
830; ATOM-NEXT:    nop
831; ATOM-NEXT:    retq
832;
833; MCU-LABEL: test17:
834; MCU:       # %bb.0: # %entry
835; MCU-NEXT:    negw %ax
836; MCU-NEXT:    sbbl %eax, %eax
837; MCU-NEXT:    # kill: def $ax killed $ax killed $eax
838; MCU-NEXT:    retl
839entry:
840  %cmp = icmp ne i16 %x, 0
841  %sub = sext i1 %cmp to i16
842  ret i16 %sub
843}
844
845define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
846; GENERIC-LABEL: test18:
847; GENERIC:       ## %bb.0:
848; GENERIC-NEXT:    cmpl $15, %edi
849; GENERIC-NEXT:    cmovgel %edx, %esi
850; GENERIC-NEXT:    movl %esi, %eax
851; GENERIC-NEXT:    retq
852;
853; ATOM-LABEL: test18:
854; ATOM:       ## %bb.0:
855; ATOM-NEXT:    cmpl $15, %edi
856; ATOM-NEXT:    cmovgel %edx, %esi
857; ATOM-NEXT:    movl %esi, %eax
858; ATOM-NEXT:    nop
859; ATOM-NEXT:    nop
860; ATOM-NEXT:    retq
861;
862; MCU-LABEL: test18:
863; MCU:       # %bb.0:
864; MCU-NEXT:    cmpl $15, %eax
865; MCU-NEXT:    jl .LBB20_2
866; MCU-NEXT:  # %bb.1:
867; MCU-NEXT:    movl %ecx, %edx
868; MCU-NEXT:  .LBB20_2:
869; MCU-NEXT:    movl %edx, %eax
870; MCU-NEXT:    retl
871  %cmp = icmp slt i32 %x, 15
872  %sel = select i1 %cmp, i8 %a, i8 %b
873  ret i8 %sel
874}
875
876define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) {
877; CHECK-LABEL: trunc_select_miscompile:
878; CHECK:       ## %bb.0:
879; CHECK-NEXT:    orb $2, %sil
880; CHECK-NEXT:    movl %esi, %ecx
881; CHECK-NEXT:    shll %cl, %edi
882; CHECK-NEXT:    movl %edi, %eax
883; CHECK-NEXT:    retq
884;
885; MCU-LABEL: trunc_select_miscompile:
886; MCU:       # %bb.0:
887; MCU-NEXT:    orb $2, %dl
888; MCU-NEXT:    movl %edx, %ecx
889; MCU-NEXT:    shll %cl, %eax
890; MCU-NEXT:    retl
891  %tmp1 = select i1 %cc, i32 3, i32 2
892  %tmp2 = shl i32 %a, %tmp1
893  ret i32 %tmp2
894}
895
896; reproducer for pr29002
897define void @clamp_i8(i32 %src, i8* %dst) {
898; GENERIC-LABEL: clamp_i8:
899; GENERIC:       ## %bb.0:
900; GENERIC-NEXT:    cmpl $127, %edi
901; GENERIC-NEXT:    movl $127, %eax
902; GENERIC-NEXT:    cmovlel %edi, %eax
903; GENERIC-NEXT:    cmpl $-128, %eax
904; GENERIC-NEXT:    movb $-128, %cl
905; GENERIC-NEXT:    jl LBB22_2
906; GENERIC-NEXT:  ## %bb.1:
907; GENERIC-NEXT:    movl %eax, %ecx
908; GENERIC-NEXT:  LBB22_2:
909; GENERIC-NEXT:    movb %cl, (%rsi)
910; GENERIC-NEXT:    retq
911;
912; ATOM-LABEL: clamp_i8:
913; ATOM:       ## %bb.0:
914; ATOM-NEXT:    cmpl $127, %edi
915; ATOM-NEXT:    movl $127, %eax
916; ATOM-NEXT:    movb $-128, %cl
917; ATOM-NEXT:    cmovlel %edi, %eax
918; ATOM-NEXT:    cmpl $-128, %eax
919; ATOM-NEXT:    jl LBB22_2
920; ATOM-NEXT:  ## %bb.1:
921; ATOM-NEXT:    movl %eax, %ecx
922; ATOM-NEXT:  LBB22_2:
923; ATOM-NEXT:    movb %cl, (%rsi)
924; ATOM-NEXT:    retq
925;
926; MCU-LABEL: clamp_i8:
927; MCU:       # %bb.0:
928; MCU-NEXT:    cmpl $127, %eax
929; MCU-NEXT:    movl $127, %ecx
930; MCU-NEXT:    jg .LBB22_2
931; MCU-NEXT:  # %bb.1:
932; MCU-NEXT:    movl %eax, %ecx
933; MCU-NEXT:  .LBB22_2:
934; MCU-NEXT:    cmpl $-128, %ecx
935; MCU-NEXT:    movb $-128, %al
936; MCU-NEXT:    jl .LBB22_4
937; MCU-NEXT:  # %bb.3:
938; MCU-NEXT:    movl %ecx, %eax
939; MCU-NEXT:  .LBB22_4:
940; MCU-NEXT:    movb %al, (%edx)
941; MCU-NEXT:    retl
942  %cmp = icmp sgt i32 %src, 127
943  %sel1 = select i1 %cmp, i32 127, i32 %src
944  %cmp1 = icmp slt i32 %sel1, -128
945  %sel2 = select i1 %cmp1, i32 -128, i32 %sel1
946  %conv = trunc i32 %sel2 to i8
947  store i8 %conv, i8* %dst, align 2
948  ret void
949}
950
951; reproducer for pr29002
952define void @clamp(i32 %src, i16* %dst) {
953; GENERIC-LABEL: clamp:
954; GENERIC:       ## %bb.0:
955; GENERIC-NEXT:    cmpl $32767, %edi ## imm = 0x7FFF
956; GENERIC-NEXT:    movl $32767, %eax ## imm = 0x7FFF
957; GENERIC-NEXT:    cmovlel %edi, %eax
958; GENERIC-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
959; GENERIC-NEXT:    movl $32768, %ecx ## imm = 0x8000
960; GENERIC-NEXT:    cmovgel %eax, %ecx
961; GENERIC-NEXT:    movw %cx, (%rsi)
962; GENERIC-NEXT:    retq
963;
964; ATOM-LABEL: clamp:
965; ATOM:       ## %bb.0:
966; ATOM-NEXT:    cmpl $32767, %edi ## imm = 0x7FFF
967; ATOM-NEXT:    movl $32767, %eax ## imm = 0x7FFF
968; ATOM-NEXT:    movl $32768, %ecx ## imm = 0x8000
969; ATOM-NEXT:    cmovlel %edi, %eax
970; ATOM-NEXT:    cmpl $-32768, %eax ## imm = 0x8000
971; ATOM-NEXT:    cmovgel %eax, %ecx
972; ATOM-NEXT:    movw %cx, (%rsi)
973; ATOM-NEXT:    retq
974;
975; MCU-LABEL: clamp:
976; MCU:       # %bb.0:
977; MCU-NEXT:    cmpl $32767, %eax # imm = 0x7FFF
978; MCU-NEXT:    movl $32767, %ecx # imm = 0x7FFF
979; MCU-NEXT:    jg .LBB23_2
980; MCU-NEXT:  # %bb.1:
981; MCU-NEXT:    movl %eax, %ecx
982; MCU-NEXT:  .LBB23_2:
983; MCU-NEXT:    cmpl $-32768, %ecx # imm = 0x8000
984; MCU-NEXT:    movl $32768, %eax # imm = 0x8000
985; MCU-NEXT:    jl .LBB23_4
986; MCU-NEXT:  # %bb.3:
987; MCU-NEXT:    movl %ecx, %eax
988; MCU-NEXT:  .LBB23_4:
989; MCU-NEXT:    movw %ax, (%edx)
990; MCU-NEXT:    retl
991  %cmp = icmp sgt i32 %src, 32767
992  %sel1 = select i1 %cmp, i32 32767, i32 %src
993  %cmp1 = icmp slt i32 %sel1, -32768
994  %sel2 = select i1 %cmp1, i32 -32768, i32 %sel1
995  %conv = trunc i32 %sel2 to i16
996  store i16 %conv, i16* %dst, align 2
997  ret void
998}
999
1000define void @test19() {
1001; This is a massive reduction of an llvm-stress test case that generates
1002; interesting chains feeding setcc and eventually a f32 select operation. This
1003; is intended to exercise the SELECT formation in the DAG combine simplifying
1004; a simplified select_cc node. If it it regresses and is no longer triggering
1005; that code path, it can be deleted.
1006;
1007; CHECK-LABEL: test19:
1008; CHECK:       ## %bb.0: ## %BB
1009; CHECK-NEXT:    movl $-1, %eax
1010; CHECK-NEXT:    movb $1, %cl
1011; CHECK-NEXT:    .p2align 4, 0x90
1012; CHECK-NEXT:  LBB24_1: ## %CF
1013; CHECK-NEXT:    ## =>This Inner Loop Header: Depth=1
1014; CHECK-NEXT:    testb %cl, %cl
1015; CHECK-NEXT:    jne LBB24_1
1016; CHECK-NEXT:  ## %bb.2: ## %CF250
1017; CHECK-NEXT:    ## in Loop: Header=BB24_1 Depth=1
1018; CHECK-NEXT:    jne LBB24_1
1019; CHECK-NEXT:    .p2align 4, 0x90
1020; CHECK-NEXT:  LBB24_3: ## %CF242
1021; CHECK-NEXT:    ## =>This Inner Loop Header: Depth=1
1022; CHECK-NEXT:    cmpl %eax, %eax
1023; CHECK-NEXT:    ucomiss %xmm0, %xmm0
1024; CHECK-NEXT:    jp LBB24_3
1025; CHECK-NEXT:  ## %bb.4: ## %CF244
1026; CHECK-NEXT:    retq
1027;
1028; MCU-LABEL: test19:
1029; MCU:       # %bb.0: # %BB
1030; MCU-NEXT:    movl $-1, %ecx
1031; MCU-NEXT:    movb $1, %al
1032; MCU-NEXT:    .p2align 4, 0x90
1033; MCU-NEXT:  .LBB24_1: # %CF
1034; MCU-NEXT:    # =>This Inner Loop Header: Depth=1
1035; MCU-NEXT:    testb %al, %al
1036; MCU-NEXT:    jne .LBB24_1
1037; MCU-NEXT:  # %bb.2: # %CF250
1038; MCU-NEXT:    # in Loop: Header=BB24_1 Depth=1
1039; MCU-NEXT:    jne .LBB24_1
1040; MCU-NEXT:  # %bb.3: # %CF242.preheader
1041; MCU-NEXT:    fldz
1042; MCU-NEXT:    .p2align 4, 0x90
1043; MCU-NEXT:  .LBB24_4: # %CF242
1044; MCU-NEXT:    # =>This Inner Loop Header: Depth=1
1045; MCU-NEXT:    cmpl %eax, %ecx
1046; MCU-NEXT:    fucom %st(0)
1047; MCU-NEXT:    fnstsw %ax
1048; MCU-NEXT:    # kill: def $ah killed $ah killed $ax
1049; MCU-NEXT:    sahf
1050; MCU-NEXT:    jp .LBB24_4
1051; MCU-NEXT:  # %bb.5: # %CF244
1052; MCU-NEXT:    fstp %st(0)
1053; MCU-NEXT:    retl
1054BB:
1055  br label %CF
1056
1057CF:
1058  %Cmp10 = icmp ule i8 undef, undef
1059  br i1 %Cmp10, label %CF, label %CF250
1060
1061CF250:
1062  %E12 = extractelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 2
1063  %Cmp32 = icmp ugt i1 %Cmp10, false
1064  br i1 %Cmp32, label %CF, label %CF242
1065
1066CF242:
1067  %Cmp38 = icmp uge i32 %E12, undef
1068  %FC = uitofp i1 %Cmp38 to float
1069  %Sl59 = select i1 %Cmp32, float %FC, float undef
1070  %Cmp60 = fcmp ugt float undef, undef
1071  br i1 %Cmp60, label %CF242, label %CF244
1072
1073CF244:
1074  %B122 = fadd float %Sl59, undef
1075  ret void
1076}
1077
1078define i16 @select_xor_1(i16 %A, i8 %cond) {
1079; CHECK-LABEL: select_xor_1:
1080; CHECK:       ## %bb.0: ## %entry
1081; CHECK-NEXT:    movl %edi, %eax
1082; CHECK-NEXT:    xorl $43, %eax
1083; CHECK-NEXT:    testb $1, %sil
1084; CHECK-NEXT:    cmovel %edi, %eax
1085; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
1086; CHECK-NEXT:    retq
1087;
1088; MCU-LABEL: select_xor_1:
1089; MCU:       # %bb.0: # %entry
1090; MCU-NEXT:    andl $1, %edx
1091; MCU-NEXT:    negl %edx
1092; MCU-NEXT:    andl $43, %edx
1093; MCU-NEXT:    xorl %edx, %eax
1094; MCU-NEXT:    # kill: def $ax killed $ax killed $eax
1095; MCU-NEXT:    retl
1096entry:
1097 %and = and i8 %cond, 1
1098 %cmp10 = icmp eq i8 %and, 0
1099 %0 = xor i16 %A, 43
1100 %1 = select i1 %cmp10, i16 %A, i16 %0
1101 ret i16 %1
1102}
1103
1104; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1105; icmp eq (and %cond, 1), 0
1106define i16 @select_xor_1b(i16 %A, i8 %cond) {
1107; CHECK-LABEL: select_xor_1b:
1108; CHECK:       ## %bb.0: ## %entry
1109; CHECK-NEXT:    movl %edi, %eax
1110; CHECK-NEXT:    xorl $43, %eax
1111; CHECK-NEXT:    testb $1, %sil
1112; CHECK-NEXT:    cmovel %edi, %eax
1113; CHECK-NEXT:    ## kill: def $ax killed $ax killed $eax
1114; CHECK-NEXT:    retq
1115;
1116; MCU-LABEL: select_xor_1b:
1117; MCU:       # %bb.0: # %entry
1118; MCU-NEXT:    testb $1, %dl
1119; MCU-NEXT:    je .LBB26_2
1120; MCU-NEXT:  # %bb.1:
1121; MCU-NEXT:    xorl $43, %eax
1122; MCU-NEXT:  .LBB26_2: # %entry
1123; MCU-NEXT:    # kill: def $ax killed $ax killed $eax
1124; MCU-NEXT:    retl
1125entry:
1126 %and = and i8 %cond, 1
1127 %cmp10 = icmp ne i8 %and, 1
1128 %0 = xor i16 %A, 43
1129 %1 = select i1 %cmp10, i16 %A, i16 %0
1130 ret i16 %1
1131}
1132
1133define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) {
1134; CHECK-LABEL: select_xor_2:
1135; CHECK:       ## %bb.0: ## %entry
1136; CHECK-NEXT:    xorl %edi, %esi
1137; CHECK-NEXT:    testb $1, %dl
1138; CHECK-NEXT:    cmovel %edi, %esi
1139; CHECK-NEXT:    movl %esi, %eax
1140; CHECK-NEXT:    retq
1141;
1142; MCU-LABEL: select_xor_2:
1143; MCU:       # %bb.0: # %entry
1144; MCU-NEXT:    andl $1, %ecx
1145; MCU-NEXT:    negl %ecx
1146; MCU-NEXT:    andl %edx, %ecx
1147; MCU-NEXT:    xorl %ecx, %eax
1148; MCU-NEXT:    retl
1149entry:
1150 %and = and i8 %cond, 1
1151 %cmp10 = icmp eq i8 %and, 0
1152 %0 = xor i32 %B, %A
1153 %1 = select i1 %cmp10, i32 %A, i32 %0
1154 ret i32 %1
1155}
1156
1157; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1158; icmp eq (and %cond, 1), 0
1159define i32 @select_xor_2b(i32 %A, i32 %B, i8 %cond) {
1160; CHECK-LABEL: select_xor_2b:
1161; CHECK:       ## %bb.0: ## %entry
1162; CHECK-NEXT:    xorl %edi, %esi
1163; CHECK-NEXT:    testb $1, %dl
1164; CHECK-NEXT:    cmovel %edi, %esi
1165; CHECK-NEXT:    movl %esi, %eax
1166; CHECK-NEXT:    retq
1167;
1168; MCU-LABEL: select_xor_2b:
1169; MCU:       # %bb.0: # %entry
1170; MCU-NEXT:    testb $1, %cl
1171; MCU-NEXT:    je .LBB28_2
1172; MCU-NEXT:  # %bb.1:
1173; MCU-NEXT:    xorl %edx, %eax
1174; MCU-NEXT:  .LBB28_2: # %entry
1175; MCU-NEXT:    retl
1176entry:
1177 %and = and i8 %cond, 1
1178 %cmp10 = icmp ne i8 %and, 1
1179 %0 = xor i32 %B, %A
1180 %1 = select i1 %cmp10, i32 %A, i32 %0
1181 ret i32 %1
1182}
1183
1184define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
1185; CHECK-LABEL: select_or:
1186; CHECK:       ## %bb.0: ## %entry
1187; CHECK-NEXT:    orl %edi, %esi
1188; CHECK-NEXT:    testb $1, %dl
1189; CHECK-NEXT:    cmovel %edi, %esi
1190; CHECK-NEXT:    movl %esi, %eax
1191; CHECK-NEXT:    retq
1192;
1193; MCU-LABEL: select_or:
1194; MCU:       # %bb.0: # %entry
1195; MCU-NEXT:    andl $1, %ecx
1196; MCU-NEXT:    negl %ecx
1197; MCU-NEXT:    andl %edx, %ecx
1198; MCU-NEXT:    orl %ecx, %eax
1199; MCU-NEXT:    retl
1200entry:
1201 %and = and i8 %cond, 1
1202 %cmp10 = icmp eq i8 %and, 0
1203 %0 = or i32 %B, %A
1204 %1 = select i1 %cmp10, i32 %A, i32 %0
1205 ret i32 %1
1206}
1207
1208; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1209; icmp eq (and %cond, 1), 0
1210define i32 @select_or_b(i32 %A, i32 %B, i8 %cond) {
1211; CHECK-LABEL: select_or_b:
1212; CHECK:       ## %bb.0: ## %entry
1213; CHECK-NEXT:    orl %edi, %esi
1214; CHECK-NEXT:    testb $1, %dl
1215; CHECK-NEXT:    cmovel %edi, %esi
1216; CHECK-NEXT:    movl %esi, %eax
1217; CHECK-NEXT:    retq
1218;
1219; MCU-LABEL: select_or_b:
1220; MCU:       # %bb.0: # %entry
1221; MCU-NEXT:    testb $1, %cl
1222; MCU-NEXT:    je .LBB30_2
1223; MCU-NEXT:  # %bb.1:
1224; MCU-NEXT:    orl %edx, %eax
1225; MCU-NEXT:  .LBB30_2: # %entry
1226; MCU-NEXT:    retl
1227entry:
1228 %and = and i8 %cond, 1
1229 %cmp10 = icmp ne i8 %and, 1
1230 %0 = or i32 %B, %A
1231 %1 = select i1 %cmp10, i32 %A, i32 %0
1232 ret i32 %1
1233}
1234
1235define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) {
1236; CHECK-LABEL: select_or_1:
1237; CHECK:       ## %bb.0: ## %entry
1238; CHECK-NEXT:    orl %edi, %esi
1239; CHECK-NEXT:    testb $1, %dl
1240; CHECK-NEXT:    cmovel %edi, %esi
1241; CHECK-NEXT:    movl %esi, %eax
1242; CHECK-NEXT:    retq
1243;
1244; MCU-LABEL: select_or_1:
1245; MCU:       # %bb.0: # %entry
1246; MCU-NEXT:    andl $1, %ecx
1247; MCU-NEXT:    negl %ecx
1248; MCU-NEXT:    andl %edx, %ecx
1249; MCU-NEXT:    orl %ecx, %eax
1250; MCU-NEXT:    retl
1251entry:
1252 %and = and i32 %cond, 1
1253 %cmp10 = icmp eq i32 %and, 0
1254 %0 = or i32 %B, %A
1255 %1 = select i1 %cmp10, i32 %A, i32 %0
1256 ret i32 %1
1257}
1258
1259; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1260; icmp eq (and %cond, 1), 0
1261define i32 @select_or_1b(i32 %A, i32 %B, i32 %cond) {
1262; CHECK-LABEL: select_or_1b:
1263; CHECK:       ## %bb.0: ## %entry
1264; CHECK-NEXT:    orl %edi, %esi
1265; CHECK-NEXT:    testb $1, %dl
1266; CHECK-NEXT:    cmovel %edi, %esi
1267; CHECK-NEXT:    movl %esi, %eax
1268; CHECK-NEXT:    retq
1269;
1270; MCU-LABEL: select_or_1b:
1271; MCU:       # %bb.0: # %entry
1272; MCU-NEXT:    testb $1, %cl
1273; MCU-NEXT:    je .LBB32_2
1274; MCU-NEXT:  # %bb.1:
1275; MCU-NEXT:    orl %edx, %eax
1276; MCU-NEXT:  .LBB32_2: # %entry
1277; MCU-NEXT:    retl
1278entry:
1279 %and = and i32 %cond, 1
1280 %cmp10 = icmp ne i32 %and, 1
1281 %0 = or i32 %B, %A
1282 %1 = select i1 %cmp10, i32 %A, i32 %0
1283 ret i32 %1
1284}
1285