Home
last modified time | relevance | path

Searched refs:setDesc (Results 1 – 25 of 160) sorted by relevance

1234567

/external/llvm/lib/Target/WebAssembly/
DWebAssemblyLowerBrUnless.cpp78 case EQ_I32: Def->setDesc(TII.get(NE_I32)); Inverted = true; break; in runOnMachineFunction()
79 case NE_I32: Def->setDesc(TII.get(EQ_I32)); Inverted = true; break; in runOnMachineFunction()
80 case GT_S_I32: Def->setDesc(TII.get(LE_S_I32)); Inverted = true; break; in runOnMachineFunction()
81 case GE_S_I32: Def->setDesc(TII.get(LT_S_I32)); Inverted = true; break; in runOnMachineFunction()
82 case LT_S_I32: Def->setDesc(TII.get(GE_S_I32)); Inverted = true; break; in runOnMachineFunction()
83 case LE_S_I32: Def->setDesc(TII.get(GT_S_I32)); Inverted = true; break; in runOnMachineFunction()
84 case GT_U_I32: Def->setDesc(TII.get(LE_U_I32)); Inverted = true; break; in runOnMachineFunction()
85 case GE_U_I32: Def->setDesc(TII.get(LT_U_I32)); Inverted = true; break; in runOnMachineFunction()
86 case LT_U_I32: Def->setDesc(TII.get(GE_U_I32)); Inverted = true; break; in runOnMachineFunction()
87 case LE_U_I32: Def->setDesc(TII.get(GT_U_I32)); Inverted = true; break; in runOnMachineFunction()
[all …]
DWebAssemblyPeephole.cpp99 MI.setDesc(TII.get(FallthroughOpc)); in MaybeRewriteToFallthrough()
192 MI.setDesc(TII.get(WebAssembly::FALLTHROUGH_RETURN_VOID)); in runOnMachineFunction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyLowerBrUnless.cpp81 case EQ_I32: Def->setDesc(TII.get(NE_I32)); Inverted = true; break; in runOnMachineFunction()
82 case NE_I32: Def->setDesc(TII.get(EQ_I32)); Inverted = true; break; in runOnMachineFunction()
83 case GT_S_I32: Def->setDesc(TII.get(LE_S_I32)); Inverted = true; break; in runOnMachineFunction()
84 case GE_S_I32: Def->setDesc(TII.get(LT_S_I32)); Inverted = true; break; in runOnMachineFunction()
85 case LT_S_I32: Def->setDesc(TII.get(GE_S_I32)); Inverted = true; break; in runOnMachineFunction()
86 case LE_S_I32: Def->setDesc(TII.get(GT_S_I32)); Inverted = true; break; in runOnMachineFunction()
87 case GT_U_I32: Def->setDesc(TII.get(LE_U_I32)); Inverted = true; break; in runOnMachineFunction()
88 case GE_U_I32: Def->setDesc(TII.get(LT_U_I32)); Inverted = true; break; in runOnMachineFunction()
89 case LT_U_I32: Def->setDesc(TII.get(GE_U_I32)); Inverted = true; break; in runOnMachineFunction()
90 case LE_U_I32: Def->setDesc(TII.get(GT_U_I32)); Inverted = true; break; in runOnMachineFunction()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMInstructionSelector.cpp191 MIB->setDesc(TII.get(ARM::VMOVDRR)); in selectMergeValues()
222 MIB->setDesc(TII.get(ARM::VMOVRRD)); in selectUnmergeValues()
547 MIB->setDesc(TII.get(Opc)); in selectGlobal()
567 MIB->setDesc(TII.get(Opc)); in selectGlobal()
587 MIB->setDesc(TII.get(ARM::ADDrr)); in selectGlobal()
599 MIB->setDesc(TII.get(ARM::MOVi32imm)); in selectGlobal()
602 MIB->setDesc(TII.get(ARM::LDRi12)); in selectGlobal()
608 MIB->setDesc(TII.get(ARM::MOVi32imm)); in selectGlobal()
610 MIB->setDesc(TII.get(ARM::LDRLIT_ga_abs)); in selectGlobal()
658 MIB->setDesc(TII.get(ARM::MOVsr)); in selectShift()
[all …]
DThumb2InstrInfo.cpp495 MI.setDesc(TII.get(ARM::tMOVr)); in rewriteT2FrameIndex()
510 MI.setDesc(TII.get(ARM::t2SUBri)); in rewriteT2FrameIndex()
512 MI.setDesc(TII.get(ARM::t2ADDri)); in rewriteT2FrameIndex()
529 MI.setDesc(TII.get(NewOpc)); in rewriteT2FrameIndex()
634 MI.setDesc(TII.get(NewOpc)); in rewriteT2FrameIndex()
667 MI.setDesc(TII.get(positiveOffsetOpcode(NewOpc))); in rewriteT2FrameIndex()
/external/llvm/lib/Target/SystemZ/
DSystemZShortenInst.cpp95 MI.setDesc(TII->get(LLIxL)); in shortenIIF()
100 MI.setDesc(TII->get(LLIxH)); in shortenIIF()
111 MI.setDesc(TII->get(Opcode)); in shortenOn0()
122 MI.setDesc(TII->get(Opcode)); in shortenOn01()
135 MI.setDesc(TII->get(Opcode)); in shortenOn001()
168 MI.setDesc(TII->get(Opcode)); in shortenFPConv()
DSystemZInstrInfo.cpp83 EarlierMI->setDesc(get(HighOpcode)); in splitMove()
84 MI->setDesc(get(LowOpcode)); in splitMove()
99 MI->setDesc(get(NewOpcode)); in splitAdjDynAlloc()
114 MI.setDesc(get(IsHigh ? HighOpcode : LowOpcode)); in expandRIPseudo()
131 MI.setDesc(get(LowOpcodeK)); in expandRIEPseudo()
135 MI.setDesc(get(DestIsHigh ? HighOpcode : LowOpcode)); in expandRIEPseudo()
149 MI.setDesc(get(Opcode)); in expandRXYPseudo()
174 Ear1MI->setDesc(get(SystemZ::EAR)); in expandLoadStackGuard()
180 SllgMI->setDesc(get(SystemZ::SLLG)); in expandLoadStackGuard()
186 Ear2MI->setDesc(get(SystemZ::EAR)); in expandLoadStackGuard()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZShortenInst.cpp95 MI.setDesc(TII->get(LLIxL)); in shortenIIF()
100 MI.setDesc(TII->get(LLIxH)); in shortenIIF()
111 MI.setDesc(TII->get(Opcode)); in shortenOn0()
122 MI.setDesc(TII->get(Opcode)); in shortenOn01()
135 MI.setDesc(TII->get(Opcode)); in shortenOn001()
168 MI.setDesc(TII->get(Opcode)); in shortenFPConv()
DSystemZInstrInfo.cpp122 EarlierMI->setDesc(get(HighOpcode)); in splitMove()
123 MI->setDesc(get(LowOpcode)); in splitMove()
138 MI->setDesc(get(NewOpcode)); in splitAdjDynAlloc()
153 MI.setDesc(get(IsHigh ? HighOpcode : LowOpcode)); in expandRIPseudo()
170 MI.setDesc(get(LowOpcodeK)); in expandRIEPseudo()
175 MI.setDesc(get(DestIsHigh ? HighOpcode : LowOpcode)); in expandRIEPseudo()
189 MI.setDesc(get(Opcode)); in expandRXYPseudo()
199 MI.setDesc(get(Opcode)); in expandLOCPseudo()
213 MI.setDesc(get(LowOpcode)); in expandLOCRPseudo()
215 MI.setDesc(get(HighOpcode)); in expandLOCRPseudo()
[all …]
/external/llvm/lib/CodeGen/
DExpandPostRAPseudos.cpp103 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
114 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
141 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
156 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DExpandPostRAPseudos.cpp99 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
110 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
137 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
154 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
DBlackfinRegisterInfo.cpp226 MI.setDesc(TII.get(isStore in eliminateFrameIndex()
232 MI.setDesc(TII.get(isStore in eliminateFrameIndex()
239 MI.setDesc(TII.get(isStore in eliminateFrameIndex()
273 MI.setDesc(TII.get(isStore ? BF::STORE16pi : BF::LOAD16pi)); in eliminateFrameIndex()
294 MI.setDesc(TII.get(BF::STORE8p_imm16)); in eliminateFrameIndex()
306 MI.setDesc(TII.get(BF::LOAD32p_imm16_8z)); in eliminateFrameIndex()
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
DFPMover.cpp107 MI->setDesc(TII->get(SP::FMOVS)); in runOnMachineBasicBlock()
109 MI->setDesc(TII->get(SP::FNEGS)); in runOnMachineBasicBlock()
111 MI->setDesc(TII->get(SP::FABSS)); in runOnMachineBasicBlock()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIShrinkInstructions.cpp267 MI.setDesc(TII->get(SOPKOpc)); in shrinkScalarCompare()
277 MI.setDesc(NewDesc); in shrinkScalarCompare()
315 MI.setDesc(TII->get(AMDGPU::V_BFREV_B32_e32)); in runOnMachineFunction()
380 MI.setDesc(TII->get(Opc)); in runOnMachineFunction()
401 MI.setDesc(TII->get(AMDGPU::S_MOVK_I32)); in runOnMachineFunction()
403 MI.setDesc(TII->get(AMDGPU::S_BREV_B32)); in runOnMachineFunction()
DSIOptimizeExecMasking.cpp144 MI.setDesc(TII.get(AMDGPU::COPY)); in removeTerminatorBit()
150 MI.setDesc(TII.get(AMDGPU::S_XOR_B64)); in removeTerminatorBit()
156 MI.setDesc(TII.get(AMDGPU::S_ANDN2_B64)); in removeTerminatorBit()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstructionSelector.cpp304 I.setDesc(TII.get(X86::COPY)); in selectCopy()
517 I.setDesc(TII.get(NewOpc)); in selectLoadStoreOp()
553 I.setDesc(TII.get(NewOpc)); in selectFrameIndexOrGep()
605 I.setDesc(TII.get(NewOpc)); in selectGlobalValue()
657 I.setDesc(TII.get(NewOpc)); in selectConstant()
682 I.setDesc(TII.get(X86::COPY)); in selectTurnIntoCOPY()
748 I.setDesc(TII.get(X86::COPY)); in selectTruncOrPtrToInt()
903 I.setDesc(TII.get(X86::COPY)); in selectAnyext()
1064 I.setDesc(TII.get(X86::VEXTRACTF32x4Z256rr)); in selectExtract()
1066 I.setDesc(TII.get(X86::VEXTRACTF128rr)); in selectExtract()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64InstructionSelector.cpp424 I.setDesc(TII.get(AArch64::COPY)); in selectCopy()
744 I.setDesc(TII.get(TargetOpcode::PHI)); in select()
795 I.setDesc(TII.get(AArch64::BR)); in select()
852 I.setDesc(TII.get(MovOpc)); in select()
899 I.setDesc(TII.get(SrcSize == 64 ? AArch64::UBFMXri : AArch64::UBFMWri)); in select()
930 I.setDesc(TII.get(DstSize == 64 ? AArch64::BFMXri : AArch64::BFMWri)); in select()
962 I.setDesc(TII.get(AArch64::ADDXri)); in select()
979 I.setDesc(TII.get(AArch64::LOADgot)); in select()
987 I.setDesc(TII.get(AArch64::MOVaddr)); in select()
1037 I.setDesc(TII.get(NewOpc)); in select()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DThumb1RegisterInfo.cpp415 MI.setDesc(TII.get(ARM::tMOVr)); in rewriteFrameIndex()
428 MI.setDesc(TII.get(Opcode)); in rewriteFrameIndex()
457 MI.setDesc(TII.get(Opcode)); in rewriteFrameIndex()
475 MI.setDesc(TII.get(ARM::tADDhirr)); in rewriteFrameIndex()
506 MI.setDesc(TII.get(NewOpc)); in rewriteFrameIndex()
670 MI.setDesc(TII.get(UseRR ? ARM::tLDRr : ARM::tLDRi)); in eliminateFrameIndex()
691 MI.setDesc(TII.get(UseRR ? ARM::tSTRr : ARM::tSTRi)); in eliminateFrameIndex()
DThumb2InstrInfo.cpp403 MI.setDesc(TII.get(ARM::tMOVr)); in rewriteT2FrameIndex()
418 MI.setDesc(TII.get(ARM::t2SUBri)); in rewriteT2FrameIndex()
420 MI.setDesc(TII.get(ARM::t2ADDri)); in rewriteT2FrameIndex()
437 MI.setDesc(TII.get(NewOpc)); in rewriteT2FrameIndex()
519 MI.setDesc(TII.get(NewOpc)); in rewriteT2FrameIndex()
552 MI.setDesc(TII.get(positiveOffsetOpcode(NewOpc))); in rewriteT2FrameIndex()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp1428 MI.setDesc(get(Pred[0].getImm() ? (isPPC64 ? PPC::BDNZLR8 : PPC::BDNZLR) in PredicateInstruction()
1431 MI.setDesc(get(PPC::BCLR)); in PredicateInstruction()
1435 MI.setDesc(get(PPC::BCLRn)); in PredicateInstruction()
1439 MI.setDesc(get(PPC::BCCLR)); in PredicateInstruction()
1449 MI.setDesc(get(Pred[0].getImm() ? (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) in PredicateInstruction()
1455 MI.setDesc(get(PPC::BC)); in PredicateInstruction()
1463 MI.setDesc(get(PPC::BCn)); in PredicateInstruction()
1471 MI.setDesc(get(PPC::BCC)); in PredicateInstruction()
1488 MI.setDesc(get(isPPC64 ? (setLR ? PPC::BCCTRL8 : PPC::BCCTR8) in PredicateInstruction()
1494 MI.setDesc(get(isPPC64 ? (setLR ? PPC::BCCTRL8n : PPC::BCCTR8n) in PredicateInstruction()
[all …]
/external/llvm/lib/Target/ARM/
DThumb2InstrInfo.cpp471 MI.setDesc(TII.get(ARM::tMOVr)); in rewriteT2FrameIndex()
486 MI.setDesc(TII.get(ARM::t2SUBri)); in rewriteT2FrameIndex()
488 MI.setDesc(TII.get(ARM::t2ADDri)); in rewriteT2FrameIndex()
505 MI.setDesc(TII.get(NewOpc)); in rewriteT2FrameIndex()
593 MI.setDesc(TII.get(NewOpc)); in rewriteT2FrameIndex()
626 MI.setDesc(TII.get(positiveOffsetOpcode(NewOpc))); in rewriteT2FrameIndex()
/external/llvm/lib/Target/Sparc/
DDelaySlotFiller.cpp191 slot->setDesc(Subtarget->getInstrInfo()->get(SP::RET)); in findDelayInstr()
394 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
433 OrMI->setDesc(TII->get((OrMI->getOpcode() == SP::ORrr) in combineRestoreOR()
470 RestoreMI->setDesc(TII->get(SP::RESTOREri)); in combineRestoreSETHIi()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/
DDelaySlotFiller.cpp189 slot->setDesc(Subtarget->getInstrInfo()->get(SP::RET)); in findDelayInstr()
392 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
431 OrMI->setDesc(TII->get((OrMI->getOpcode() == SP::ORrr) in combineRestoreOR()
468 RestoreMI->setDesc(TII->get(SP::RESTOREri)); in combineRestoreSETHIi()
/external/llvm/lib/Target/AMDGPU/
DSIShrinkInstructions.cpp233 MI.setDesc(TII->get(AMDGPU::V_BFREV_B32_e32)); in runOnMachineFunction()
293 MI.setDesc(TII->get(Opc)); in runOnMachineFunction()
304 MI.setDesc(TII->get(AMDGPU::S_MOVK_I32)); in runOnMachineFunction()
DSIFoldOperands.cpp143 MI->setDesc(TII->get(AMDGPU::V_MAD_F32)); in tryAddToFoldList()
149 MI->setDesc(TII->get(Opc)); in tryAddToFoldList()
247 UseMI->setDesc(TII->get(MovOp)); in foldOperand()

1234567