| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 119 setIndexedStoreAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
120 setIndexedStoreAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
121 setIndexedStoreAction(ISD::PRE_DEC, MVT::i8, Legal); in AVRTargetLowering()
122 setIndexedStoreAction(ISD::PRE_DEC, MVT::i16, Legal); in AVRTargetLowering()
|
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetLowering.h | 1096 void setIndexedStoreAction(unsigned IdxMode, MVT VT, in setIndexedStoreAction() function
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 97 setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
98 setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
99 setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
100 setIndexedStoreAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
101 setIndexedStoreAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 449 setIndexedStoreAction(im, MVT::i8, Legal); in AArch64TargetLowering()
450 setIndexedStoreAction(im, MVT::i16, Legal); in AArch64TargetLowering()
451 setIndexedStoreAction(im, MVT::i32, Legal); in AArch64TargetLowering()
452 setIndexedStoreAction(im, MVT::i64, Legal); in AArch64TargetLowering()
453 setIndexedStoreAction(im, MVT::f64, Legal); in AArch64TargetLowering()
454 setIndexedStoreAction(im, MVT::f32, Legal); in AArch64TargetLowering()
455 setIndexedStoreAction(im, MVT::f16, Legal); in AArch64TargetLowering()
712 setIndexedStoreAction(im, VT, Legal); in addTypeForNEON()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 104 setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
105 setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
106 setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
107 setIndexedStoreAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
108 setIndexedStoreAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
109 setIndexedStoreAction(ISD::PRE_INC, MVT::f32, Legal); in PPCTargetLowering()
110 setIndexedStoreAction(ISD::PRE_INC, MVT::f64, Legal); in PPCTargetLowering()
724 setIndexedStoreAction(ISD::PRE_INC, MVT::v4f64, Legal); in PPCTargetLowering()
770 setIndexedStoreAction(ISD::PRE_INC, MVT::v4f32, Legal); in PPCTargetLowering()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 534 setIndexedStoreAction(im, MVT::i8, Legal); in AArch64TargetLowering()
535 setIndexedStoreAction(im, MVT::i16, Legal); in AArch64TargetLowering()
536 setIndexedStoreAction(im, MVT::i32, Legal); in AArch64TargetLowering()
537 setIndexedStoreAction(im, MVT::i64, Legal); in AArch64TargetLowering()
538 setIndexedStoreAction(im, MVT::f64, Legal); in AArch64TargetLowering()
539 setIndexedStoreAction(im, MVT::f32, Legal); in AArch64TargetLowering()
540 setIndexedStoreAction(im, MVT::f16, Legal); in AArch64TargetLowering()
827 setIndexedStoreAction(im, VT, Legal); in addTypeForNEON()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 1470 void setIndexedStoreAction(unsigned IdxMode, MVT VT, in setIndexedStoreAction() function
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 591 setIndexedStoreAction(IM, VT, Expand); in initActions()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 170 setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
171 setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
172 setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
173 setIndexedStoreAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
174 setIndexedStoreAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
178 setIndexedStoreAction(ISD::PRE_INC, MVT::f32, Legal); in PPCTargetLowering()
179 setIndexedStoreAction(ISD::PRE_INC, MVT::f64, Legal); in PPCTargetLowering()
926 setIndexedStoreAction(ISD::PRE_INC, MVT::v4f64, Legal); in PPCTargetLowering()
971 setIndexedStoreAction(ISD::PRE_INC, MVT::v4f32, Legal); in PPCTargetLowering()
|
| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 859 setIndexedStoreAction(IM, VT, Expand); in initActions()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 1843 void setIndexedStoreAction(unsigned IdxMode, MVT VT, in setIndexedStoreAction() function
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 2068 setIndexedStoreAction(ISD::POST_INC, LSXTy, Legal); in HexagonTargetLowering()
2074 setIndexedStoreAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 75 setIndexedStoreAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
|
| D | HexagonISelLowering.cpp | 1574 setIndexedStoreAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 540 setIndexedStoreAction(im, MVT::i1, Legal); in ARMTargetLowering()
541 setIndexedStoreAction(im, MVT::i8, Legal); in ARMTargetLowering()
542 setIndexedStoreAction(im, MVT::i16, Legal); in ARMTargetLowering()
543 setIndexedStoreAction(im, MVT::i32, Legal); in ARMTargetLowering()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 794 setIndexedStoreAction(im, MVT::i1, Legal); in ARMTargetLowering()
795 setIndexedStoreAction(im, MVT::i8, Legal); in ARMTargetLowering()
796 setIndexedStoreAction(im, MVT::i16, Legal); in ARMTargetLowering()
797 setIndexedStoreAction(im, MVT::i32, Legal); in ARMTargetLowering()
802 setIndexedStoreAction(ISD::POST_INC, MVT::i32, Legal); in ARMTargetLowering()
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 561 setIndexedStoreAction(IM, (MVT::SimpleValueType)VT, Expand); in TargetLowering()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 713 setIndexedStoreAction(im, MVT::i1, Legal); in ARMTargetLowering()
714 setIndexedStoreAction(im, MVT::i8, Legal); in ARMTargetLowering()
715 setIndexedStoreAction(im, MVT::i16, Legal); in ARMTargetLowering()
716 setIndexedStoreAction(im, MVT::i32, Legal); in ARMTargetLowering()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1373 * ``setIndexedStoreAction`` --- Indexed store.
|
| /external/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1333 * ``setIndexedStoreAction`` --- Indexed store.
|