Searched refs:slcr_base (Results 1 – 5 of 5) sorted by relevance
/external/u-boot/arch/arm/mach-zynq/ |
D | slcr.c | 92 writel(SLCR_LOCK_MAGIC, &slcr_base->slcr_lock); in zynq_slcr_lock() 100 writel(SLCR_UNLOCK_MAGIC, &slcr_base->slcr_unlock); in zynq_slcr_unlock() 120 clrbits_le32(&slcr_base->reboot_status, 0xF000000); in zynq_slcr_cpu_reset() 122 writel(1, &slcr_base->pss_rst_ctrl); in zynq_slcr_cpu_reset() 132 writel(0xF, &slcr_base->fpga_rst_ctrl); in zynq_slcr_devcfg_disable() 135 reg_val = readl(&slcr_base->lvl_shftr_en); in zynq_slcr_devcfg_disable() 137 writel(reg_val, &slcr_base->lvl_shftr_en); in zynq_slcr_devcfg_disable() 140 writel(0xA, &slcr_base->lvl_shftr_en); in zynq_slcr_devcfg_disable() 150 writel(0xF, &slcr_base->lvl_shftr_en); in zynq_slcr_devcfg_enable() 153 writel(0x0, &slcr_base->fpga_rst_ctrl); in zynq_slcr_devcfg_enable() [all …]
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D | cpu.c | 59 writel(0x1F, &slcr_base->ocm_cfg); in arch_cpu_init() 61 writel(0x0, &slcr_base->fpga_rst_ctrl); in arch_cpu_init() 63 writel(0x0, &slcr_base->ddr_urgent_sel); in arch_cpu_init() 65 writel(0xC, &slcr_base->ddr_urgent); in arch_cpu_init()
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/external/u-boot/drivers/clk/ |
D | clk_zynq.c | 59 return &slcr_base->arm_pll_ctrl; in zynq_clk_get_register() 61 return &slcr_base->ddr_pll_ctrl; in zynq_clk_get_register() 63 return &slcr_base->io_pll_ctrl; in zynq_clk_get_register() 65 return &slcr_base->lqspi_clk_ctrl; in zynq_clk_get_register() 67 return &slcr_base->smc_clk_ctrl; in zynq_clk_get_register() 69 return &slcr_base->pcap_clk_ctrl; in zynq_clk_get_register() 71 return &slcr_base->sdio_clk_ctrl; in zynq_clk_get_register() 73 return &slcr_base->uart_clk_ctrl; in zynq_clk_get_register() 75 return &slcr_base->spi_clk_ctrl; in zynq_clk_get_register() 78 return &slcr_base->dci_clk_ctrl; in zynq_clk_get_register() [all …]
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/external/u-boot/arch/arm/include/asm/arch-zynqmp/ |
D | hardware.h | 95 #define slcr_base ((struct iou_slcr_regs *)ZYNQMP_IOU_SLCR_BASEADDR) macro
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/external/u-boot/arch/arm/mach-zynq/include/mach/ |
D | hardware.h | 93 #define slcr_base ((struct slcr_regs *)ZYNQ_SYS_CTRL_BASEADDR) macro
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