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Searched refs:soc (Results 1 – 25 of 274) sorted by relevance

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/external/u-boot/arch/mips/mach-ath79/include/mach/
Dath79.h41 return gd->arch.soc == ATH79_SOC_AR7130 || in soc_is_ar71xx()
42 gd->arch.soc == ATH79_SOC_AR7141 || in soc_is_ar71xx()
43 gd->arch.soc == ATH79_SOC_AR7161; in soc_is_ar71xx()
48 return gd->arch.soc == ATH79_SOC_AR7240 || in soc_is_ar724x()
49 gd->arch.soc == ATH79_SOC_AR7241 || in soc_is_ar724x()
50 gd->arch.soc == ATH79_SOC_AR7242; in soc_is_ar724x()
55 return gd->arch.soc == ATH79_SOC_AR7240; in soc_is_ar7240()
60 return gd->arch.soc == ATH79_SOC_AR7241; in soc_is_ar7241()
65 return gd->arch.soc == ATH79_SOC_AR7242; in soc_is_ar7242()
70 return gd->arch.soc == ATH79_SOC_AR9130 || in soc_is_ar913x()
[all …]
/external/eigen/test/
Dproduct_mmtr.cpp39 MatrixColMaj soc(size,othersize); soc.setRandom(); in mmtr() local
48 CHECK_MMTR(matc, Lower, = s*soc*sor.adjoint()); in mmtr()
49 CHECK_MMTR(matc, Upper, = s*(soc*soc.adjoint())); in mmtr()
50 CHECK_MMTR(matr, Lower, = s*soc*soc.adjoint()); in mmtr()
51 CHECK_MMTR(matr, Upper, = soc*(s*sor.adjoint())); in mmtr()
53 CHECK_MMTR(matc, Lower, += s*soc*soc.adjoint()); in mmtr()
54 CHECK_MMTR(matc, Upper, += s*(soc*sor.transpose())); in mmtr()
55 CHECK_MMTR(matr, Lower, += s*sor*soc.adjoint()); in mmtr()
56 CHECK_MMTR(matr, Upper, += soc*(s*soc.adjoint())); in mmtr()
58 CHECK_MMTR(matc, Lower, -= s*soc*soc.adjoint()); in mmtr()
[all …]
/external/u-boot/drivers/usb/common/
Dfsl-errata.c21 u32 soc = SVR_SOC_VER(svr); in has_dual_phy() local
23 switch (soc) { in has_dual_phy()
50 u32 soc = SVR_SOC_VER(svr); in has_erratum_a006261() local
52 switch (soc) { in has_erratum_a006261()
83 u32 soc = SVR_SOC_VER(svr); in has_erratum_a007075() local
85 switch (soc) { in has_erratum_a007075()
111 u32 soc = SVR_SOC_VER(svr); in has_erratum_a007792() local
113 switch (soc) { in has_erratum_a007792()
137 u32 soc = SVR_SOC_VER(svr); in has_erratum_a005697() local
139 switch (soc) { in has_erratum_a005697()
[all …]
/external/u-boot/arch/arm/mach-socfpga/
Dqts-filter.sh19 soc="$1"
38 ${in_bsp_dir}/generated/iocsr_config_${soc}.h |
45 ${in_bsp_dir}/generated/iocsr_config_${soc}.c |
62 soc="$1"
81 ${in_bsp_dir}/generated/pinmux_config_${soc}.c |
98 soc="$1"
141 soc="$1"
214 soc="$1"
225 ! -d "${out_dir}" -o -z "${soc}" ] ; then
230 process_iocsr_config "${soc}" "${in_qts_dir}" "${in_bsp_dir}" "${out_dir}"
[all …]
/external/u-boot/arch/mips/mach-ath79/
Dcpu.c14 const enum ath79_soc_type soc; member
51 enum ath79_soc_type soc = ATH79_SOC_UNKNOWN; in mach_cpu_init() local
91 soc = desc[i].soc; in mach_cpu_init()
97 gd->arch.soc = soc; in mach_cpu_init()
105 enum ath79_soc_type soc = ATH79_SOC_UNKNOWN; in print_cpuinfo() local
111 if (desc[i].soc == gd->arch.soc) { in print_cpuinfo()
113 soc = desc[i].soc; in print_cpuinfo()
122 switch (soc) { in print_cpuinfo()
/external/perf_data_converter/src/quipper/testdata/
Dperf.data.intel_pt-4.14.buildids5 709e206ee1e31f2f78494b617c75de0bf073a26c /lib/modules/4.14.18/kernel/sound/soc/intel/boards/snd-soc
9 7cd34c285394372a4270f66109c5a89039ce4939 /lib/modules/4.14.18/kernel/sound/soc/codecs/snd-soc-dmic.…
11 d034f46b1db1726298dff98d5682ffee80742067 /lib/modules/4.14.18/kernel/sound/soc/codecs/snd-soc-hdac-…
26 …3ef5f838edd62af1b7965e43180afd2b /lib/modules/4.14.18/kernel/sound/soc/intel/skylake/snd-soc-skl.ko
27 …69c4744fe1715377236e7e3036dd6 /lib/modules/4.14.18/kernel/sound/soc/intel/skylake/snd-soc-skl-ipc.…
28 6bb18684b9da7d6012f8ffd40b7d3e92735f584a /lib/modules/4.14.18/kernel/sound/soc/intel/common/snd-soc
30 f5182211c887c35165f4d6f349f51cd9b9405d53 /lib/modules/4.14.18/kernel/sound/soc/intel/common/snd-soc
33 d69c8ef8a30a3717fa13a1ff2e3cc00526efcbd2 /lib/modules/4.14.18/kernel/sound/soc/intel/common/snd-soc
36 9ef77d10098e19ec938439947a4adbe70847690d /lib/modules/4.14.18/kernel/sound/soc/codecs/snd-soc-nau88…
38 8b12e95e019123ed314e99c15316d19c46a777df /lib/modules/4.14.18/kernel/sound/soc/codecs/snd-soc-ssm45…
/external/u-boot/arch/arm/mach-mvebu/
Dmbus.c113 mbus->soc->win_cfg_offset(win); in mvebu_mbus_read_window()
134 if (win < mbus->soc->num_remappable_wins) { in mvebu_mbus_read_window()
149 addr = mbus->mbuswins_base + mbus->soc->win_cfg_offset(win); in mvebu_mbus_disable_window()
153 if (win < mbus->soc->num_remappable_wins) { in mvebu_mbus_disable_window()
164 mbus->soc->win_cfg_offset(win); in mvebu_mbus_window_is_free()
180 for (win = 0; win < mbus->soc->num_wins; win++) { in mvebu_mbus_window_conflicts()
217 for (win = 0; win < mbus->soc->num_wins; win++) { in mvebu_mbus_find_window()
242 mbus->soc->win_cfg_offset(win); in mvebu_mbus_setup_window()
252 if (win < mbus->soc->num_remappable_wins) { in mvebu_mbus_setup_window()
272 for (win = mbus->soc->num_remappable_wins; in mvebu_mbus_alloc_window()
[all …]
/external/u-boot/drivers/pci/
Dpci_tegra.c226 const struct tegra_pcie_soc *soc; member
608 const struct tegra_pcie_soc *soc = pcie->soc; in tegra_pcie_power_on() local
636 if (soc->has_cml_clk) { in tegra_pcie_power_on()
655 const struct tegra_pcie_soc *soc = pcie->soc; in tegra_pcie_pll_wait() local
660 value = pads_readl(pcie, soc->pads_pll_ctl); in tegra_pcie_pll_wait()
670 const struct tegra_pcie_soc *soc = pcie->soc; in tegra_pcie_phy_enable() local
686 value = pads_readl(pcie, soc->pads_pll_ctl); in tegra_pcie_phy_enable()
688 value |= PADS_PLL_CTL_REFCLK_INTERNAL_CML | soc->tx_ref_sel; in tegra_pcie_phy_enable()
689 pads_writel(pcie, value, soc->pads_pll_ctl); in tegra_pcie_phy_enable()
692 value = pads_readl(pcie, soc->pads_pll_ctl); in tegra_pcie_phy_enable()
[all …]
/external/autotest/client/site_tests/graphics_LibDRM/
Dgraphics_LibDRM.py44 soc = utils.get_cpu_soc_family()
45 if not soc in arch_tests:
47 soc)
48 elif soc == 'tegra':
51 tests = tests_common + arch_tests[soc]
/external/u-boot/board/toradex/common/
Dtdx-cfg-block.c266 char *soc; in get_cfgblock_interactive() local
278 soc = env_get("soc"); in get_cfgblock_interactive()
279 if (!strcmp("mx6", soc)) { in get_cfgblock_interactive()
303 } else if (!strcmp("imx7d", soc)) { in get_cfgblock_interactive()
305 } else if (!strcmp("imx7s", soc)) { in get_cfgblock_interactive()
307 } else if (!strcmp("tegra20", soc)) { in get_cfgblock_interactive()
324 } else if (!strcmp("tegra30", soc)) { in get_cfgblock_interactive()
340 } else if (!strcmp("tegra124", soc)) { in get_cfgblock_interactive()
342 } else if (!strcmp("vf500", soc)) { in get_cfgblock_interactive()
347 } else if (!strcmp("vf610", soc)) { in get_cfgblock_interactive()
/external/u-boot/drivers/misc/
Dstm32_rcc.c16 .soc = STM32F42X,
21 .soc = STM32F469,
26 .soc = STM32F7,
50 rcc_clk->soc, in stm32_rcc_bind()
/external/u-boot/include/
Dfsl_errata.h40 u32 soc = SVR_SOC_VER(svr); in has_erratum_a007186() local
42 switch (soc) { in has_erratum_a007186()
64 u32 soc = SVR_SOC_VER(svr); in has_erratum_a008378() local
67 switch (soc) { in has_erratum_a008378()
/external/u-boot/tools/buildman/
Dboard.py74 def __init__(self, status, arch, cpu, soc, vendor, board_name, target, options): argument
92 self.soc = soc
95 self.vendor, self.soc, self.options]
/external/u-boot/drivers/qe/
Dqe.c461 if (firmware->soc.model) in qe_upload_firmware()
463 firmware->id, be16_to_cpu(firmware->soc.model), in qe_upload_firmware()
464 firmware->soc.major, firmware->soc.minor); in qe_upload_firmware()
600 if (firmware->soc.model) in u_qe_upload_firmware()
602 firmware->id, be16_to_cpu(firmware->soc.model), in u_qe_upload_firmware()
603 firmware->soc.major, firmware->soc.minor); in u_qe_upload_firmware()
/external/u-boot/arch/arm/cpu/armv7/vf610/
Dgeneric.c327 char soc[6]; in arch_misc_init() local
329 strcpy(soc, "vf"); in arch_misc_init()
330 strcat(soc, soc_type); in arch_misc_init()
331 env_set("soc", soc); in arch_misc_init()
/external/u-boot/arch/arm/dts/
Duniphier-v7-u-boot.dtsi2 soc {
17 soc-glue@5f800000 {
Dimx6dl.dtsi35 fsl,soc-operating-points = <
51 soc-supply = <&reg_soc>;
62 soc {
Ddragonboard410c.dts33 stdout-path = "/soc/serial@78b0000";
36 soc {
73 gpio-bank-name="soc";
Duniphier-sld8.dtsi47 soc {
308 soc-glue@5f800000 {
309 compatible = "socionext,uniphier-sld8-soc-glue",
318 soc-glue@5f900000 {
319 compatible = "socionext,uniphier-sld8-soc-glue-debug",
Duniphier-ld4.dtsi47 soc {
304 soc-glue@5f800000 {
305 compatible = "socionext,uniphier-ld4-soc-glue",
314 soc-glue@5f900000 {
315 compatible = "socionext,uniphier-ld4-soc-glue-debug",
/external/u-boot/doc/device-tree-bindings/gpio/
Dgpio-msm.txt11 - gpio-bank-name: (optional) name of gpio bank. As default "soc" is used.
20 gpio-bank-name="soc";
/external/u-boot/test/stdint/
Dtest-includes.sh20 local soc=$3
36 ln -s $(pwd)/arch/${arch}/include/asm/arch-${soc} \
/external/u-boot/doc/device-tree-bindings/thermal/
Dti_soc_thermal.txt17 the mapping may change from soc to soc, apart from depending
/external/u-boot/arch/arm/include/asm/mach-imx/
Dsys_proto.h25 #define is_soc_type(soc) (get_soc_type() == soc) argument
/external/autotest/client/cros/graphics/
Dgraphics_utils.py997 soc = utils.get_cpu_soc_family()
1003 soc = 'amdgpu'
1005 soc = 'i915'
1009 soc = 'cirrus'
1015 soc = 'virtio'
1017 if not soc in self.arch_fields:
1018 raise error.TestFail('Error: Architecture "%s" not yet supported.' % soc)
1019 fields = self.arch_fields[soc]

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