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Searched refs:stencil_mt (Results 1 – 14 of 14) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dgen8_depth_state.c43 struct intel_mipmap_tree *stencil_mt, in emit_depth_packets() argument
56 if (!depth_mt && !stencil_mt && brw->no_depth_or_stencil) { in emit_depth_packets()
68 (stencil_mt != NULL && stencil_writable) << 27 | in emit_depth_packets()
103 if (stencil_mt == NULL) { in emit_depth_packets()
115 (stencil_mt->surf.row_pitch - 1)); in emit_depth_packets()
116 OUT_RELOC64(stencil_mt->bo, RELOC_WRITE, 0); in emit_depth_packets()
117 OUT_BATCH(stencil_mt->surf.array_pitch_el_rows >> 2); in emit_depth_packets()
127 brw->no_depth_or_stencil = !depth_mt && !stencil_mt; in emit_depth_packets()
137 struct intel_mipmap_tree *stencil_mt, in gen8_emit_depth_stencil_hiz() argument
150 const struct intel_mipmap_tree *mt = depth_mt ? depth_mt : stencil_mt; in gen8_emit_depth_stencil_hiz()
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Dgen6_depth_state.c42 struct intel_mipmap_tree *stencil_mt, in gen6_emit_depth_stencil_hiz() argument
53 const struct intel_mipmap_tree *mt = depth_mt ? depth_mt : stencil_mt; in gen6_emit_depth_stencil_hiz()
181 assert(stencil_mt->format == MESA_FORMAT_S_UINT8); in gen6_emit_depth_stencil_hiz()
182 assert(stencil_mt->surf.size > 0); in gen6_emit_depth_stencil_hiz()
185 isl_surf_get_image_offset_B_tile_sa(&stencil_mt->surf, in gen6_emit_depth_stencil_hiz()
190 OUT_BATCH(stencil_mt->surf.row_pitch - 1); in gen6_emit_depth_stencil_hiz()
191 OUT_RELOC(stencil_mt->bo, RELOC_WRITE, offset); in gen6_emit_depth_stencil_hiz()
Dgen7_misc_state.c37 struct intel_mipmap_tree *stencil_mt, in gen7_emit_depth_stencil_hiz() argument
51 const struct intel_mipmap_tree *mt = depth_mt ? depth_mt : stencil_mt; in gen7_emit_depth_stencil_hiz()
112 ((stencil_mt != NULL && brw->stencil_write_enabled) << 27) | in gen7_emit_depth_stencil_hiz()
157 if (stencil_mt == NULL) { in gen7_emit_depth_stencil_hiz()
164 stencil_mt->r8stencil_needs_update = true; in gen7_emit_depth_stencil_hiz()
171 (stencil_mt->surf.row_pitch - 1)); in gen7_emit_depth_stencil_hiz()
172 OUT_RELOC(stencil_mt->bo, RELOC_WRITE, 0); in gen7_emit_depth_stencil_hiz()
Dintel_copy_image.c126 assert((src_mt->stencil_mt != NULL) == (dst_mt->stencil_mt != NULL)); in intel_copy_image_sub_data()
128 if (dst_mt->stencil_mt) { in intel_copy_image_sub_data()
129 copy_miptrees(brw, src_mt->stencil_mt, src_x, src_y, src_z, src_level, in intel_copy_image_sub_data()
130 dst_mt->stencil_mt, dst_x, dst_y, dst_z, dst_level, in intel_copy_image_sub_data()
Dbrw_misc_state.c113 !srb->mt->stencil_mt && in brw_depthbuffer_format()
130 if (irb->mt->stencil_mt) in get_stencil_miptree()
131 return irb->mt->stencil_mt; in get_stencil_miptree()
267 struct intel_mipmap_tree *stencil_mt = get_stencil_miptree(stencil_irb); in brw_emit_depthbuffer() local
277 if (stencil_mt) { in brw_emit_depthbuffer()
278 separate_stencil = stencil_mt->format == MESA_FORMAT_S_UINT8; in brw_emit_depthbuffer()
289 depth_mt = stencil_mt; in brw_emit_depthbuffer()
337 if (stencil_mt) in brw_emit_depthbuffer()
338 brw_cache_flush_for_depth(brw, stencil_mt->bo); in brw_emit_depthbuffer()
342 stencil_mt, hiz, separate_stencil, in brw_emit_depthbuffer()
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Dintel_fbo.c643 struct intel_mipmap_tree *depth_mt = NULL, *stencil_mt = NULL; in intel_validate_framebuffer() local
653 stencil_mt = stencilRb->mt; in intel_validate_framebuffer()
654 if (stencil_mt->stencil_mt) in intel_validate_framebuffer()
655 stencil_mt = stencil_mt->stencil_mt; in intel_validate_framebuffer()
658 if (depth_mt && stencil_mt) { in intel_validate_framebuffer()
666 const unsigned s_width = stencil_mt->surf.phys_level0_sa.width; in intel_validate_framebuffer()
667 const unsigned s_height = stencil_mt->surf.phys_level0_sa.height; in intel_validate_framebuffer()
668 const unsigned s_depth = stencil_mt->surf.dim == ISL_SURF_DIM_3D ? in intel_validate_framebuffer()
669 stencil_mt->surf.phys_level0_sa.depth : in intel_validate_framebuffer()
670 stencil_mt->surf.phys_level0_sa.array_len; in intel_validate_framebuffer()
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Dintel_mipmap_tree.c657 mt->stencil_mt = make_surface(brw, mt->target, MESA_FORMAT_S_UINT8, in make_separate_stencil_surface()
669 if (!mt->stencil_mt) in make_separate_stencil_surface()
672 mt->stencil_mt->r8stencil_needs_update = true; in make_separate_stencil_surface()
1231 intel_miptree_release(&(*mt)->stencil_mt); in intel_miptree_release()
1304 if (mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT && mt->stencil_mt) in intel_miptree_match_image()
1306 if (mt->format == MESA_FORMAT_Z_FLOAT32 && mt->stencil_mt) in intel_miptree_match_image()
1524 if (dst_mt->stencil_mt) { in intel_miptree_copy_slice_sw()
1525 assert(src_mt->stencil_mt); in intel_miptree_copy_slice_sw()
1527 src_mt->stencil_mt, src_level, src_layer, in intel_miptree_copy_slice_sw()
1528 dst_mt->stencil_mt, dst_level, dst_layer, in intel_miptree_copy_slice_sw()
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Dbrw_blorp.c478 if (buffer_bit == GL_STENCIL_BUFFER_BIT && mt->stencil_mt) in find_miptree()
479 mt = mt->stencil_mt; in find_miptree()
721 if (src_mt->stencil_mt) in brw_blorp_copytexsubimage()
722 src_mt = src_mt->stencil_mt; in brw_blorp_copytexsubimage()
723 if (dst_mt->stencil_mt) in brw_blorp_copytexsubimage()
724 dst_mt = dst_mt->stencil_mt; in brw_blorp_copytexsubimage()
1412 struct intel_mipmap_tree *stencil_mt = NULL; in brw_blorp_clear_depth_stencil() local
1415 stencil_mt = find_miptree(GL_STENCIL_BUFFER_BIT, irb); in brw_blorp_clear_depth_stencil()
1429 intel_miptree_prepare_access(brw, stencil_mt, level, 1, in brw_blorp_clear_depth_stencil()
1434 blorp_surf_for_miptree(brw, &stencil_surf, stencil_mt, in brw_blorp_clear_depth_stencil()
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Dbrw_clear.c292 if (mt && mt->stencil_mt) in brw_clear()
293 mt->stencil_mt->r8stencil_needs_update = true; in brw_clear()
Dbrw_context.h739 struct intel_mipmap_tree *stencil_mt,
1678 struct intel_mipmap_tree *stencil_mt,
1688 struct intel_mipmap_tree *stencil_mt,
1698 struct intel_mipmap_tree *stencil_mt,
1707 struct intel_mipmap_tree *stencil_mt,
Dintel_mipmap_tree.h307 struct intel_mipmap_tree *stencil_mt; member
Dbrw_wm_surface_state.c535 assert(mt->r8stencil_mt && !mt->stencil_mt->r8stencil_needs_update); in brw_update_texture_surface()
538 mt = mt->stencil_mt; in brw_update_texture_surface()
Dintel_screen.c525 image->has_depthstencil = irb->mt->stencil_mt? true : false; in intel_create_image_from_renderbuffer()
582 image->has_depthstencil = iobj->mt->stencil_mt? true : false; in intel_create_image_from_texture()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_fbo.c555 struct intel_mipmap_tree *depth_mt = NULL, *stencil_mt = NULL; in intel_validate_framebuffer() local
565 stencil_mt = stencilRb->mt; in intel_validate_framebuffer()
567 if (depth_mt && stencil_mt) { in intel_validate_framebuffer()
572 if (depth_mt == stencil_mt) { in intel_validate_framebuffer()