/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
D | Utils.cpp | 129 I.tieOperands(DefIdx, OpI); in constrainSelectedInstRegOperands()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZShortenInst.cpp | 70 MI.tieOperands(0, 1); in tieOpsIfNeeded()
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D | SystemZInstrInfo.cpp | 137 MI.tieOperands(0, 1); in expandRIEPseudo()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZShortenInst.cpp | 70 MI.tieOperands(0, 1); in tieOpsIfNeeded()
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D | SystemZInstrInfo.cpp | 177 MI.tieOperands(0, 1); in expandRIEPseudo()
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/external/llvm/lib/Target/AMDGPU/ |
D | SIShrinkInstructions.cpp | 294 MI.tieOperands(0, 1); in runOnMachineFunction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIShrinkInstructions.cpp | 381 MI.tieOperands(0, 1); in runOnMachineFunction()
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D | SIPeepholeSDWA.cpp | 510 MI.tieOperands(AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vdst), in convertToSDWA() 1048 SDWAInst->tieOperands(PreserveDstIdx, SDWAInst->getNumOperands() - 1); in convertToSDWA()
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D | SIInstrInfo.cpp | 1265 MovRel->tieOperands(ImpDefIdx, ImpUseIdx); in expandPostRAPseudo()
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/external/llvm/include/llvm/CodeGen/ |
D | MachineInstr.h | 1034 void tieOperands(unsigned DefIdx, unsigned UseIdx);
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/external/llvm/lib/Target/Lanai/ |
D | LanaiInstrInfo.cpp | 537 NewMI->tieOperands(0, NewMI->getNumOperands() - 1); in optimizeSelect()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
D | LanaiInstrInfo.cpp | 535 NewMI->tieOperands(0, NewMI->getNumOperands() - 1); in optimizeSelect()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | MachineInstr.h | 1122 void tieOperands(unsigned DefIdx, unsigned UseIdx);
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | MachineInstr.cpp | 282 tieOperands(DefIdx, OpNo); in addOperand() 872 void MachineInstr::tieOperands(unsigned DefIdx, unsigned UseIdx) { in tieOperands() function in MachineInstr
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D | MachinePipeliner.cpp | 3217 NewMI->tieOperands(i, UseIdx); in cloneInstr()
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/external/llvm/lib/CodeGen/ |
D | MachineInstr.cpp | 851 tieOperands(DefIdx, OpNo); in addOperand() 1399 void MachineInstr::tieOperands(unsigned DefIdx, unsigned UseIdx) { in tieOperands() function in MachineInstr
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D | MachinePipeliner.cpp | 3092 NewMI->tieOperands(i, UseIdx); in cloneInstr()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | InstrEmitter.cpp | 1010 MIB->tieOperands(DefIdx + j, UseIdx + j); in EmitSpecialNode()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonExpandCondsets.cpp | 522 DefI->tieOperands(P.second, DefI->getNumOperands()-1); in updateDeadsInRange()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | InstrEmitter.cpp | 1094 MIB->tieOperands(DefIdx + j, UseIdx + j); in EmitSpecialNode()
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/external/llvm/lib/CodeGen/MIRParser/ |
D | MIParser.cpp | 943 MI.tieOperands(TiedPair.first, TiedPair.second); in assignRegisterTies()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/MIRParser/ |
D | MIParser.cpp | 1190 MI.tieOperands(TiedPair.first, TiedPair.second); in assignRegisterTies()
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/external/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 1934 NewMI->tieOperands(0, NewMI->getNumOperands() - 1); in optimizeSelect()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 2135 NewMI->tieOperands(0, NewMI->getNumOperands() - 1); in optimizeSelect()
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D | ARMISelLowering.cpp | 9601 MI.tieOperands(DefIdx, i); in AdjustInstrPostInstrSelection()
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