| /external/webrtc/webrtc/modules/video_coding/ |
| D | timing_unittest.cc | 29 VCMTiming timing(&clock); in TEST() local
35 timing.Reset(); in TEST()
37 timing.UpdateCurrentDelay(timeStamp); in TEST()
39 timing.Reset(); in TEST()
41 timing.IncomingTimestamp(timeStamp, clock.TimeInMilliseconds()); in TEST()
43 timing.SetJitterDelay(jitterDelayMs); in TEST()
44 timing.UpdateCurrentDelay(timeStamp); in TEST()
45 timing.set_render_delay(0); in TEST()
46 waitTime = timing.MaxWaitingTime( in TEST()
47 timing.RenderTimeMs(timeStamp, clock.TimeInMilliseconds()), in TEST()
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| /external/u-boot/drivers/video/ |
| D | atmel_lcdfb.c | 32 struct display_timing timing; member
114 static void atmel_fb_init(ulong addr, struct display_timing *timing, int bpix, in atmel_fb_init() argument
134 value = (timing->hactive.typ * timing->vactive.typ * in atmel_fb_init()
140 value = get_lcdc_clk_rate(0) / timing->pixelclock.typ; in atmel_fb_init()
141 if (get_lcdc_clk_rate(0) % timing->pixelclock.typ) in atmel_fb_init()
156 if (!(timing->flags & DISPLAY_FLAGS_HSYNC_HIGH)) in atmel_fb_init()
158 if (!(timing->flags & DISPLAY_FLAGS_VSYNC_HIGH)) in atmel_fb_init()
164 value = (timing->vsync_len.typ - 1) << ATMEL_LCDC_VPW_OFFSET; in atmel_fb_init()
165 value |= timing->vback_porch.typ << ATMEL_LCDC_VBP_OFFSET; in atmel_fb_init()
166 value |= timing->vfront_porch.typ; in atmel_fb_init()
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| D | atmel_hlcdfb.c | 254 struct display_timing timing; member
294 struct display_timing *timing = &priv->timing; in atmel_hlcdc_init() local
325 value = priv->clk_rate / timing->pixelclock.typ; in atmel_hlcdc_init()
326 if (priv->clk_rate % timing->pixelclock.typ) in atmel_hlcdc_init()
330 if (timing->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) in atmel_hlcdc_init()
357 if (!(timing->flags & DISPLAY_FLAGS_HSYNC_HIGH)) in atmel_hlcdc_init()
359 if (!(timing->flags & DISPLAY_FLAGS_VSYNC_HIGH)) in atmel_hlcdc_init()
385 value = LCDC_LCDCFG1_VSPW(timing->vsync_len.typ - 1); in atmel_hlcdc_init()
386 value |= LCDC_LCDCFG1_HSPW(timing->hsync_len.typ - 1); in atmel_hlcdc_init()
389 value = LCDC_LCDCFG2_VBPW(timing->vback_porch.typ); in atmel_hlcdc_init()
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| D | display-uclass.c | 22 const struct display_timing *timing) in display_enable() argument
30 ret = ops->enable(dev, panel_bpp, timing); in display_enable()
40 int display_read_timing(struct udevice *dev, struct display_timing *timing) in display_read_timing() argument
48 return ops->read_timing(dev, timing); in display_read_timing()
56 return edid_get_timing(buf, ret, timing, &panel_bits_per_colour); in display_read_timing()
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| /external/u-boot/drivers/video/tegra124/ |
| D | display.c | 25 static int tegra_dc_calc_refresh(const struct display_timing *timing) in tegra_dc_calc_refresh() argument
28 int pclk = timing->pixelclock.typ; in tegra_dc_calc_refresh()
30 h_total = timing->hactive.typ + timing->hfront_porch.typ + in tegra_dc_calc_refresh()
31 timing->hback_porch.typ + timing->hsync_len.typ; in tegra_dc_calc_refresh()
32 v_total = timing->vactive.typ + timing->vfront_porch.typ + in tegra_dc_calc_refresh()
33 timing->vback_porch.typ + timing->vsync_len.typ; in tegra_dc_calc_refresh()
43 static void print_mode(const struct display_timing *timing) in print_mode() argument
45 int refresh = tegra_dc_calc_refresh(timing); in print_mode()
48 timing->hactive.typ, timing->vactive.typ, refresh / 1000, in print_mode()
49 refresh % 1000, timing->pixelclock.typ); in print_mode()
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| D | dp.c | 482 const struct display_timing *timing, in tegra_dc_dp_calc_config() argument
507 if (!link_rate || !link_cfg->lane_count || !timing->pixelclock.typ || in tegra_dc_dp_calc_config()
511 if ((u64)timing->pixelclock.typ * link_cfg->bits_per_pixel >= in tegra_dc_dp_calc_config()
515 num_linkclk_line = (u32)(lldiv(link_rate * timing->hactive.typ, in tegra_dc_dp_calc_config()
516 timing->pixelclock.typ)); in tegra_dc_dp_calc_config()
518 ratio_f = (u64)timing->pixelclock.typ * link_cfg->bits_per_pixel * f; in tegra_dc_dp_calc_config()
598 num_symbols_per_line = (timing->hactive.typ * in tegra_dc_dp_calc_config()
619 link_cfg->hblank_sym = (int)lldiv(((uint64_t)timing->hback_porch.typ + in tegra_dc_dp_calc_config()
620 timing->hfront_porch.typ + timing->hsync_len.typ - 7) * in tegra_dc_dp_calc_config()
621 link_rate, timing->pixelclock.typ) - in tegra_dc_dp_calc_config()
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| /external/u-boot/common/ |
| D | edid.c | 82 static void decode_timing(u8 *buf, struct display_timing *timing) in decode_timing() argument
90 set_entry(&timing->pixelclock, (buf[0] + (buf[1] << 8)) * 10000); in decode_timing()
104 set_entry(&timing->hactive, ha); in decode_timing()
105 set_entry(&timing->hfront_porch, hso); in decode_timing()
106 set_entry(&timing->hback_porch, hbl - hso - hspw); in decode_timing()
107 set_entry(&timing->hsync_len, hspw); in decode_timing()
109 set_entry(&timing->vactive, va); in decode_timing()
110 set_entry(&timing->vfront_porch, vso); in decode_timing()
111 set_entry(&timing->vback_porch, vbl - vso - vspw); in decode_timing()
112 set_entry(&timing->vsync_len, vspw); in decode_timing()
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| /external/u-boot/board/xilinx/zynqmp/ |
| D | tap_delays.c | 84 static void arasan_zynqmp_tap_sdr104(u8 deviceid, u8 timing, u8 bank) in arasan_zynqmp_tap_sdr104() argument
105 static void arasan_zynqmp_tap_hs(u8 deviceid, u8 timing, u8 bank) in arasan_zynqmp_tap_hs() argument
117 if (timing == MMC_TIMING_MMC_HS) in arasan_zynqmp_tap_hs()
133 if (timing == MMC_TIMING_MMC_HS) in arasan_zynqmp_tap_hs()
142 static void arasan_zynqmp_tap_ddr50(u8 deviceid, u8 timing, u8 bank) in arasan_zynqmp_tap_ddr50() argument
150 if (timing == MMC_TIMING_UHS_DDR50) in arasan_zynqmp_tap_ddr50()
158 if (timing == MMC_TIMING_UHS_DDR50) in arasan_zynqmp_tap_ddr50()
170 if (timing == MMC_TIMING_UHS_DDR50) in arasan_zynqmp_tap_ddr50()
178 if (timing == MMC_TIMING_UHS_DDR50) in arasan_zynqmp_tap_ddr50()
187 static void arasan_zynqmp_tap_sdr50(u8 deviceid, u8 timing, u8 bank) in arasan_zynqmp_tap_sdr50() argument
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| /external/u-boot/drivers/video/stm32/ |
| D | stm32_ltdc.c | 22 struct display_timing timing; member
215 struct display_timing *timing = &priv->timing; in stm32_ltdc_set_mode() local
221 hsync = timing->hsync_len.typ - 1; in stm32_ltdc_set_mode()
222 vsync = timing->vsync_len.typ - 1; in stm32_ltdc_set_mode()
223 acc_hbp = hsync + timing->hback_porch.typ; in stm32_ltdc_set_mode()
224 acc_vbp = vsync + timing->vback_porch.typ; in stm32_ltdc_set_mode()
225 acc_act_w = acc_hbp + timing->hactive.typ; in stm32_ltdc_set_mode()
226 acc_act_h = acc_vbp + timing->vactive.typ; in stm32_ltdc_set_mode()
227 total_w = acc_act_w + timing->hfront_porch.typ; in stm32_ltdc_set_mode()
228 total_h = acc_act_h + timing->vfront_porch.typ; in stm32_ltdc_set_mode()
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| /external/u-boot/drivers/mmc/ |
| D | xenon_sdhci.c | 123 u8 timing; member
141 if ((priv->timing == MMC_TIMING_UHS_SDR50) || in xenon_mmc_phy_init()
142 (priv->timing == MMC_TIMING_UHS_SDR25) || in xenon_mmc_phy_init()
143 (priv->timing == MMC_TIMING_UHS_SDR12) || in xenon_mmc_phy_init()
144 (priv->timing == MMC_TIMING_SD_HS) || in xenon_mmc_phy_init()
145 (priv->timing == MMC_TIMING_LEGACY)) in xenon_mmc_phy_init()
230 if ((priv->timing == MMC_TIMING_MMC_HS400) || in xenon_mmc_phy_set()
231 (priv->timing == MMC_TIMING_MMC_HS200) || in xenon_mmc_phy_set()
232 (priv->timing == MMC_TIMING_UHS_SDR50) || in xenon_mmc_phy_set()
233 (priv->timing == MMC_TIMING_UHS_SDR104) || in xenon_mmc_phy_set()
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| /external/u-boot/drivers/video/rockchip/ |
| D | rk_mipi.c | 29 struct display_timing *timing) in rk_mipi_read_timing() argument
34 0, timing); in rk_mipi_read_timing()
79 const struct display_timing *timing) in rk_mipi_dsi_enable() argument
91 rk_mipi_dsi_write(regs, VID_HSA_TIME, timing->hsync_len.typ); in rk_mipi_dsi_enable()
92 rk_mipi_dsi_write(regs, VID_HBP_TIME, timing->hback_porch.typ); in rk_mipi_dsi_enable()
93 rk_mipi_dsi_write(regs, VID_HLINE_TIME, (timing->hsync_len.typ in rk_mipi_dsi_enable()
94 + timing->hback_porch.typ + timing->hactive.typ in rk_mipi_dsi_enable()
95 + timing->hfront_porch.typ)); in rk_mipi_dsi_enable()
96 rk_mipi_dsi_write(regs, VID_VSA_LINES, timing->vsync_len.typ); in rk_mipi_dsi_enable()
97 rk_mipi_dsi_write(regs, VID_VBP_LINES, timing->vback_porch.typ); in rk_mipi_dsi_enable()
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| /external/u-boot/drivers/usb/host/ |
| D | ehci-tegra.c | 302 const unsigned *timing; in get_pll_timing() local
304 timing = controller->pll_parameter + in get_pll_timing()
307 return timing; in get_pll_timing()
350 const unsigned *timing; in init_utmi_usb_controller() local
387 timing = get_pll_timing(controller); in init_utmi_usb_controller()
392 timing[PARAM_STABLE_COUNT] << in init_utmi_usb_controller()
395 timing[PARAM_ACTIVE_DELAY_COUNT] << in init_utmi_usb_controller()
402 timing[PARAM_ENABLE_DELAY_COUNT] << in init_utmi_usb_controller()
405 timing[PARAM_XTAL_FREQ_COUNT] << in init_utmi_usb_controller()
413 timing[PARAM_STABLE_COUNT] << in init_utmi_usb_controller()
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| /external/u-boot/drivers/ram/ |
| D | stm32_sdram.c | 161 struct stm32_sdram_timing *timing; in stm32_sdram_init() local
174 timing = params->bank_params[i].sdram_timing; in stm32_sdram_init()
196 writel(timing->trcd << FMC_SDTR_TRCD_SHIFT in stm32_sdram_init()
197 | timing->trp << FMC_SDTR_TRP_SHIFT in stm32_sdram_init()
198 | timing->twr << FMC_SDTR_TWR_SHIFT in stm32_sdram_init()
199 | timing->trc << FMC_SDTR_TRC_SHIFT in stm32_sdram_init()
200 | timing->tras << FMC_SDTR_TRAS_SHIFT in stm32_sdram_init()
201 | timing->txsr << FMC_SDTR_TXSR_SHIFT in stm32_sdram_init()
202 | timing->tmrd << FMC_SDTR_TMRD_SHIFT, in stm32_sdram_init()
206 writel(timing->trcd << FMC_SDTR_TRCD_SHIFT in stm32_sdram_init()
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| /external/proguard/src/proguard/gui/splash/ |
| D | ConstantTiming.java | 30 private final double timing; field in ConstantTiming
45 public ConstantTiming(double timing) in ConstantTiming() argument
47 this.timing = timing; in ConstantTiming()
55 return timing; in getTiming()
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| D | LinearDouble.java | 32 private final Timing timing; field in LinearDouble
41 public LinearDouble(double fromValue, double toValue, Timing timing) in LinearDouble() argument
45 this.timing = timing; in LinearDouble()
53 return fromValue + timing.getTiming(time) * (toValue - fromValue); in getDouble()
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| D | LinearInt.java | 32 private final Timing timing; field in LinearInt
41 public LinearInt(int fromValue, int toValue, Timing timing) in LinearInt() argument
45 this.timing = timing; in LinearInt()
53 return (int) (fromValue + timing.getTiming(time) * (toValue - fromValue)); in getInt()
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| D | TypeWriterString.java | 33 private final Timing timing; field in TypeWriterString
44 public TypeWriterString(String string, Timing timing) in TypeWriterString() argument
47 this.timing = timing; in TypeWriterString()
55 double t = timing.getTiming(time); in getString()
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| D | LinearColor.java | 34 private final Timing timing; field in LinearColor
46 public LinearColor(Color fromValue, Color toValue, Timing timing) in LinearColor() argument
50 this.timing = timing; in LinearColor()
58 double t = timing.getTiming(time); in getColor()
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| D | SmoothTiming.java | 61 double timing = (double) (time - fromTime) / (double) (toTime - fromTime); in getTiming() local
64 return timing * timing * (3.0 - 2.0 * timing); in getTiming()
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| /external/webrtc/talk/media/base/ |
| D | rtpdataengine.h | 54 void SetTiming(rtc::Timing* timing) { in SetTiming() argument
55 timing_.reset(timing); in SetTiming()
88 explicit RtpDataMediaChannel(rtc::Timing* timing);
94 void set_timing(rtc::Timing* timing) { in set_timing() argument
95 timing_ = timing; in set_timing()
123 void Construct(rtc::Timing* timing);
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| /external/u-boot/drivers/video/sunxi/ |
| D | sunxi_lcd.c | 21 struct display_timing timing; member
69 struct display_timing *timing) in sunxi_lcd_read_timing() argument
73 memcpy(timing, &priv->timing, sizeof(struct display_timing)); in sunxi_lcd_read_timing()
100 &priv->timing, &channel_bpp); in sunxi_lcd_probe()
118 0, &priv->timing)) { in sunxi_lcd_probe()
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| D | sunxi_display.c | 211 (struct edid_detailed_timing *)edid1.monitor_details.timing; in sunxi_hdmi_edid_get_mode()
614 struct display_timing *timing) in sunxi_ctfb_mode_to_display_timing() argument
616 timing->pixelclock.typ = mode->pixclock_khz * 1000; in sunxi_ctfb_mode_to_display_timing()
618 timing->hactive.typ = mode->xres; in sunxi_ctfb_mode_to_display_timing()
619 timing->hfront_porch.typ = mode->right_margin; in sunxi_ctfb_mode_to_display_timing()
620 timing->hback_porch.typ = mode->left_margin; in sunxi_ctfb_mode_to_display_timing()
621 timing->hsync_len.typ = mode->hsync_len; in sunxi_ctfb_mode_to_display_timing()
623 timing->vactive.typ = mode->yres; in sunxi_ctfb_mode_to_display_timing()
624 timing->vfront_porch.typ = mode->lower_margin; in sunxi_ctfb_mode_to_display_timing()
625 timing->vback_porch.typ = mode->upper_margin; in sunxi_ctfb_mode_to_display_timing()
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| /external/u-boot/board/samsung/common/ |
| D | board.c | 190 err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing, in decode_sromc()
236 smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) | in board_eth_init()
237 SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) | in board_eth_init()
238 SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) | in board_eth_init()
239 SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) | in board_eth_init()
240 SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) | in board_eth_init()
241 SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) | in board_eth_init()
242 SROMC_BC_PMC(config.timing[FDT_SROM_PMC]); in board_eth_init()
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| /external/u-boot/include/ |
| D | display.h | 32 int display_read_timing(struct udevice *dev, struct display_timing *timing);
43 const struct display_timing *timing);
61 int (*read_timing)(struct udevice *dev, struct display_timing *timing);
82 const struct display_timing *timing);
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| /external/speex/libspeexdsp/ |
| D | jitter.c | 84 spx_int32_t timing[MAX_TIMINGS]; /**< Sorted list of all timings ("latest" packets first) */ member
95 static void tb_add(struct TimingBuffer *tb, spx_int16_t timing) in tb_add() argument
99 if (tb->filled >= MAX_TIMINGS && timing >= tb->timing[tb->filled-1]) in tb_add()
108 while (pos<tb->filled && timing >= tb->timing[pos]) in tb_add()
121 SPEEX_MOVE(&tb->timing[pos+1], &tb->timing[pos], move_size); in tb_add()
125 tb->timing[pos] = timing; in tb_add()
217 if (pos[j] < tb[j].filled && tb[j].timing[pos[j]] < latest) in compute_opt_delay()
220 latest = tb[j].timing[pos[j]]; in compute_opt_delay()
333 static void update_timings(JitterBuffer *jitter, spx_int32_t timing) in update_timings() argument
335 if (timing < -32767) in update_timings()
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