/external/u-boot/board/gateworks/gw_ventana/ |
D | gw_ventana_spl.c | 157 .trcd = 1375, 171 .trcd = 1375, 185 .trcd = 1375, 199 .trcd = 1375,
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/external/u-boot/board/freescale/mx6memcal/ |
D | spl.c | 253 .trcd = 1375, 267 .trcd = 1375, 281 .trcd = 1375, 295 .trcd = 1350,
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/external/u-boot/arch/arm/mach-sunxi/dram_timings/ |
D | lpddr3_stock.c | 13 u8 trcd = max(ns_to_t(24), 2); in mctl_set_timing_params() local 63 writel(DRAMTMG4_TRCD(trcd) | DRAMTMG4_TCCD(tccd) | DRAMTMG4_TRRD(trrd) | in mctl_set_timing_params()
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D | ddr3_1333.c | 13 u8 trcd = ns_to_t(15); in mctl_set_timing_params() local 67 writel(DRAMTMG4_TRCD(trcd) | DRAMTMG4_TCCD(tccd) | DRAMTMG4_TRRD(trrd) | in mctl_set_timing_params()
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D | ddr2_v3s.c | 13 u8 trcd = ns_to_t(20); in mctl_set_timing_params() local 64 writel(DRAMTMG4_TRCD(trcd) | DRAMTMG4_TCCD(tccd) | DRAMTMG4_TRRD(trrd) | in mctl_set_timing_params()
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/external/u-boot/arch/arm/mach-imx/mx6/ |
D | opos6ul.c | 205 .trcd = 1500, 246 mem_ddr.trcd = 1375; in spl_dram_init()
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D | ddr.c | 1231 u16 trcd, trc, tras, twr, tmrd, trtp, trp, twtr, trfc, txs, txpr; in mx6_ddr3_cfg() local 1336 tcl = DIV_ROUND_UP(ddr3_cfg->trcd, clkper / 10) - 3; in mx6_ddr3_cfg() 1337 trp = DIV_ROUND_UP(ddr3_cfg->trcd, clkper / 10) - 1; in mx6_ddr3_cfg() 1339 trcd = trp; in mx6_ddr3_cfg() 1361 debug("trcd=%d\n", trcd); in mx6_ddr3_cfg() 1434 mmdc0->mdcfg1 = (trcd << 29) | (trp << 26) | (trc << 21) | in mx6_ddr3_cfg()
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/external/u-boot/drivers/ram/ |
D | stm32_sdram.c | 126 u8 trcd; member 196 writel(timing->trcd << FMC_SDTR_TRCD_SHIFT in stm32_sdram_init() 206 writel(timing->trcd << FMC_SDTR_TRCD_SHIFT in stm32_sdram_init()
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/external/u-boot/board/liebherr/mccmon6/ |
D | spl.c | 139 .trcd = 1375, 153 .trcd = 1350,
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/external/u-boot/board/compulab/cm_fx6/ |
D | spl.c | 115 .trcd = 1800, 184 .trcd = 1324,
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/external/u-boot/doc/device-tree-bindings/clock/ |
D | rockchip,rk3288-dmc.txt | 50 rockchip,trcd: tRCD,AC timing parameters from the memory data-sheet 68 trcd 142 rockchip,trcd = <10>;
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/external/u-boot/arch/arm/mach-sunxi/ |
D | dram_sun8i_a83t.c | 95 u8 trcd = ns_to_t(15); in auto_set_timing_para() local 147 trcd = max(ns_to_t(24), 2); in auto_set_timing_para() 178 reg_val = (trcd << 24) | (tccd << 16) | (trrd << 8) | (trp << 0); in auto_set_timing_para()
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D | dram_sun8i_a33.c | 95 u8 trcd = ns_to_t(15); in auto_set_timing_para() local 146 reg_val = (trcd << 24) | (tccd << 16) | (trrd << 8) | (trp << 0); in auto_set_timing_para()
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/external/u-boot/include/ |
D | spd.h | 44 unsigned char trcd; /* 29 Min RAS to CAS Delay (tRCD) */ member
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D | ddr_spd.h | 44 unsigned char trcd; /* 29 Min RAS to CAS Delay (tRCD) */ member 106 unsigned char trcd; /* 29 Min RAS to CAS Delay (tRCD) */ member
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/external/u-boot/board/phytec/pfla02/ |
D | pfla02.c | 502 .trcd = 1375, 517 .trcd = 1375, 532 .trcd = 1375,
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/external/u-boot/board/engicam/common/ |
D | spl.c | 210 .trcd = 1375, 360 .trcd = 1375,
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/external/u-boot/arch/arm/include/asm/arch-omap3/ |
D | mem.h | 66 #define ACTIM_CTRLA(trfc, trc, tras, trp, trcd, trrd, tdpl, tdal) \ argument 71 ACTIM_CTRLA_TRCD(trcd) | \
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/external/u-boot/board/bachmann/ot1200/ |
D | ot1200_spl.c | 98 .trcd = 1375,
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/external/u-boot/board/ccv/xpress/ |
D | spl.c | 74 .trcd = 1375,
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/external/u-boot/board/wandboard/ |
D | spl.c | 188 .trcd = 1375, 202 .trcd = 1350,
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/external/u-boot/board/barco/platinum/ |
D | spl_picon.c | 93 .trcd = 1375,
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D | spl_titanium.c | 93 .trcd = 1375,
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/external/u-boot/arch/arm/include/asm/arch-rockchip/ |
D | sdram.h | 58 u32 trcd; member
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D | sdram_rk3036.h | 55 u32 trcd; member 252 u32 trcd; member
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