/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.td | 947 def VOP3Mods0 : ComplexPattern<untyped, 4, "SelectVOP3Mods0">; 948 def VOP3Mods0Clamp : ComplexPattern<untyped, 3, "SelectVOP3Mods0Clamp">; 949 def VOP3Mods0Clamp0OMod : ComplexPattern<untyped, 4, "SelectVOP3Mods0Clamp0OMod">; 950 def VOP3Mods : ComplexPattern<untyped, 2, "SelectVOP3Mods">; 951 def VOP3NoMods : ComplexPattern<untyped, 1, "SelectVOP3NoMods">; 955 def VOP3OMods : ComplexPattern<untyped, 3, "SelectVOP3OMods">; 957 def VOP3PMods : ComplexPattern<untyped, 2, "SelectVOP3PMods">; 958 def VOP3PMods0 : ComplexPattern<untyped, 3, "SelectVOP3PMods0">; 960 def VOP3OpSel : ComplexPattern<untyped, 2, "SelectVOP3OpSel">; 961 def VOP3OpSel0 : ComplexPattern<untyped, 3, "SelectVOP3OpSel0">; [all …]
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D | VOP1Instructions.td | 111 VOPProfile<[dstVt, srcVt, untyped, untyped]> { 240 def VOP_I32_VI32_NO_EXT : VOPProfile<[i32, i32, untyped, untyped]> { 252 def VOP_MOVRELD : VOPProfile<[untyped, i32, untyped, untyped]> { 368 def VOP_SWAP_I32 : VOPProfile<[i32, i32, i32, untyped]> {
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D | VOP3Instructions.td | 226 def VOP3_INTERP : VOPProfile<[f32, f32, i32, untyped]> { 234 def VOP3_INTERP_MOV : VOPProfile<[f32, i32, i32, untyped]> { 442 def V_INTERP_P1LL_F16 : VOP3Interp <"v_interp_p1ll_f16", VOP3_INTERP16<[f32, f32, i32, untyped]>>;
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.td | 629 def VOP3Mods0 : ComplexPattern<untyped, 4, "SelectVOP3Mods0">; 630 def VOP3NoMods0 : ComplexPattern<untyped, 4, "SelectVOP3NoMods0">; 631 def VOP3Mods0Clamp : ComplexPattern<untyped, 3, "SelectVOP3Mods0Clamp">; 632 def VOP3Mods0Clamp0OMod : ComplexPattern<untyped, 4, "SelectVOP3Mods0Clamp0OMod">; 633 def VOP3Mods : ComplexPattern<untyped, 2, "SelectVOP3Mods">; 634 def VOP3NoMods : ComplexPattern<untyped, 2, "SelectVOP3NoMods">; 1139 !if (!eq(Src0.Value, untyped.Value), 0, 1140 !if (!eq(Src1.Value, untyped.Value), 1, // VOP1 1141 !if (!eq(Src2.Value, untyped.Value), 2, // VOP2 1438 field bit HasDst = !if(!eq(DstVT.Value, untyped.Value), 0, 1); [all …]
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/external/python/pyasn1/docs/source/pyasn1/type/opentype/ |
D | opentype.rst | 14 The |OpenType| class models an untyped field of a constructed ASN.1
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | ValueTypes.td | 61 def untyped: ValueType<8 , 36>; // Produces an untyped value
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZRegisterInfo.td | 111 // register pairs as untyped instead. 112 defm GR128 : SystemZRegClass<"GR128", [untyped], 128, 122 defm ADDR128 : SystemZRegClass<"ADDR128", [untyped], 128, (sub GR128Bit, R0Q)>; 276 def v128any : TypedReg<untyped, VR128>;
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D | SystemZOperators.td | 42 [SDTCisVT<0, untyped>, 43 SDTCisVT<1, untyped>, 46 [SDTCisVT<0, untyped>, 47 SDTCisVT<1, untyped>,
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/external/llvm/lib/Target/AArch64/ |
D | AArch64RegisterInfo.td | 389 def FPR8 : RegisterClass<"AArch64", [untyped], 8, (sequence "B%u", 0, 31)> { 421 def DD : RegisterClass<"AArch64", [untyped], 64, (add DSeqPairs)> { 424 def DDD : RegisterClass<"AArch64", [untyped], 64, (add DSeqTriples)> { 427 def DDDD : RegisterClass<"AArch64", [untyped], 64, (add DSeqQuads)> { 439 def QQ : RegisterClass<"AArch64", [untyped], 128, (add QSeqPairs)> { 442 def QQQ : RegisterClass<"AArch64", [untyped], 128, (add QSeqTriples)> { 445 def QQQQ : RegisterClass<"AArch64", [untyped], 128, (add QSeqQuads)> { 610 def WSeqPairsClass : RegisterClass<"AArch64", [untyped], 32, 614 def XSeqPairsClass : RegisterClass<"AArch64", [untyped], 64,
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/external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/ |
D | ConcatenatedSubregs.td | 64 def Dtup2 : MyClass<64, [untyped], (add Dtup2regs)>; 69 def Stup2 : MyClass<32, [untyped], (interleave DRegs, Stup2_odds_regs)>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZRegisterInfo.td | 114 // register pairs as untyped instead. 115 defm GR128 : SystemZRegClass<"GR128", [untyped], 128, 125 defm ADDR128 : SystemZRegClass<"ADDR128", [untyped], 128, (sub GR128Bit, R0Q)>; 290 def v128any : TypedReg<untyped, VR128>;
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D | SystemZOperators.td | 45 [SDTCisVT<0, untyped>, 82 [SDTCisVT<0, untyped>, 85 [SDTCisVT<0, untyped>, 88 [SDTCisVT<0, untyped>, 91 SDTCisVT<3, untyped>, 92 SDTCisVT<4, untyped>]>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64RegisterInfo.td | 408 def FPR8 : RegisterClass<"AArch64", [untyped], 8, (sequence "B%u", 0, 31)> { 440 def DD : RegisterClass<"AArch64", [untyped], 64, (add DSeqPairs)> { 443 def DDD : RegisterClass<"AArch64", [untyped], 64, (add DSeqTriples)> { 446 def DDDD : RegisterClass<"AArch64", [untyped], 64, (add DSeqQuads)> { 458 def QQ : RegisterClass<"AArch64", [untyped], 128, (add QSeqPairs)> { 461 def QQQ : RegisterClass<"AArch64", [untyped], 128, (add QSeqTriples)> { 464 def QQQQ : RegisterClass<"AArch64", [untyped], 128, (add QSeqQuads)> { 651 def WSeqPairsClass : RegisterClass<"AArch64", [untyped], 32, 655 def XSeqPairsClass : RegisterClass<"AArch64", [untyped], 64, 946 def ZPR2 : RegisterClass<"AArch64", [untyped], 128, (add ZSeqPairs)> { [all …]
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/external/llvm/include/llvm/CodeGen/ |
D | ValueTypes.td | 98 def untyped: ValueType<8 , 67>; // Produces an untyped value
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/external/protobuf/src/google/protobuf/compiler/js/ |
D | js_generator.cc | 2187 bool untyped = in GenerateClassField() local 2204 if (untyped) { in GenerateClassField() 2226 if (untyped) { in GenerateClassField() 2270 if (untyped) { in GenerateClassField() 2284 if (field->type() == FieldDescriptor::TYPE_BYTES && !untyped) { in GenerateClassField() 2289 if (untyped) { in GenerateClassField() 2318 untyped ? "/** @type{string|number|boolean|Array|undefined} */(" : "", in GenerateClassField() 2319 "typeclose", untyped ? ")" : "", in GenerateClassField() 2326 if (untyped) { in GenerateClassField()
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/external/perfetto/protos/perfetto/trace/track_event/ |
D | debug_annotation.proto | 22 // Key/value annotations provided in untyped TRACE_EVENT macros. These
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D | track_event.proto | 73 // TODO(eseckler): May also want a debug_name for untyped debug-only events.
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | ValueTypes.td | 147 def untyped: ValueType<8 , 112>; // Produces an untyped value
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/external/llvm/lib/Target/Mips/ |
D | MipsRegisterInfo.td | 430 def ACC64 : RegisterClass<"Mips", [untyped], 64, (add AC0)> { 434 def ACC128 : RegisterClass<"Mips", [untyped], 128, (add AC0_64)> { 438 def ACC64DSP : RegisterClass<"Mips", [untyped], 64, (sequence "AC%u", 0, 3)> {
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsRegisterInfo.td | 445 def ACC64 : RegisterClass<"Mips", [untyped], 64, (add AC0)> { 449 def ACC128 : RegisterClass<"Mips", [untyped], 128, (add AC0_64)> { 453 def ACC64DSP : RegisterClass<"Mips", [untyped], 64, (sequence "AC%u", 0, 3)> {
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/external/llvm/lib/Target/ARM/ |
D | ARMRegisterInfo.td | 353 def GPRPair : RegisterClass<"ARM", [untyped], 64, (add Tuples2R)> { 364 def DTriple : RegisterClass<"ARM", [untyped], 64, (add Tuples3D)> { 419 def DTripleSpc : RegisterClass<"ARM", [untyped], 64, (add Tuples3DSpc)> {
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/external/swiftshader/third_party/LLVM/lib/VMCore/ |
D | ValueTypes.cpp | 142 case MVT::untyped: return "untyped"; in getEVTString()
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/external/hamcrest/ |
D | CHANGES.txt | 37 * Fix issue 59 - add untyped version of equalTo, named equalToObject
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMRegisterInfo.td | 404 def GPRPair : RegisterClass<"ARM", [untyped], 64, (add Tuples2R)> { 415 def DTriple : RegisterClass<"ARM", [untyped], 64, (add Tuples3D)> { 470 def DTripleSpc : RegisterClass<"ARM", [untyped], 64, (add Tuples3DSpc)> {
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/external/v8/src/compiler/ |
D | pipeline.cc | 521 void RunPrintAndVerify(const char* phase, bool untyped = false); 1948 void Run(PipelineData* data, Zone* temp_zone, const bool untyped, in Run() 1962 Verifier::Run(data->graph(), !untyped ? Verifier::TYPED : Verifier::UNTYPED, in Run() 1968 void PipelineImpl::RunPrintAndVerify(const char* phase, bool untyped) { in RunPrintAndVerify() argument 1974 Run<VerifyGraphPhase>(untyped); in RunPrintAndVerify()
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