| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | uxt_rot.ll | 56 ; CHECK-V6: uxtah r0, r0, r1
57 ; CHECK-V7: uxtah r0, r0, r1
92 ; CHECK-V6: uxtah r0, r1, r0, ror #8
93 ; CHECK-V7: uxtah r0, r1, r0, ror #8
105 ; CHECK-V6: uxtah r0, r1, r0, ror #24
106 ; CHECK-V7: uxtah r0, r1, r0, ror #24
147 ; CHECK-V6: uxtah r0, r1, r0
148 ; CHECK-V7: uxtah r0, r1, r0
156 ; CHECK-V6: uxtah r0, r1, r0, ror #8
157 ; CHECK-V7: uxtah r0, r1, r0, ror #8
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-uxt_rot.ll | 51 ; CHECK-DSP: uxtah r0, r0, r1, ror #8
52 ; CHECK-NO-DSP-NOT: uxtah
73 ; CHECK-DSP: uxtah r0, r0, r1, ror #24
74 ; CHECK-NO-DSP-NOT: uxtah
86 ; CHECK-DSP: uxtah r0, r0, r1, ror #24
87 ; CHECK-NO-DSP-NOT: uxtah
|
| D | thumb2-sxt-uxt.ll | 97 ; CHECK-DSP: uxtah r0, r0, r1
98 ; CHECK-NO-DSP-NOT: uxtah
106 ;CHECK-DSP: uxtah r0, r0, r1
107 ;CHECK-NO-DSP-NOT: uxtah
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | thumb2-dsp-diag.s | 21 uxtah r0, r0, r0 label
31 @ CHECK-7EM: uxtah r0, r0, r0 @ encoding: [0x10,0xfa,0x80,0xf0]
|
| D | basic-arm-instructions.s | 3471 uxtah r1, r3, r9
3473 uxtah r3, r8, r3, ror #8
3475 uxtah r9, r3, r3, ror #24
3477 @ CHECK: uxtah r1, r3, r9 @ encoding: [0x79,0x10,0xf3,0xe6]
3479 @ CHECK: uxtah r3, r8, r3, ror #8 @ encoding: [0x73,0x34,0xf8,0xe6]
3481 @ CHECK: uxtah r9, r3, r3, ror #24 @ encoding: [0x73,0x9c,0xf3,0xe6]
|
| D | basic-thumb2-instructions.s | 3669 uxtah r1, r3, r9
3672 uxtah r3, r8, r3, ror #8
3675 uxtah r9, r3, r3, ror #24
3677 @ CHECK: uxtah r1, r3, r9 @ encoding: [0x13,0xfa,0x89,0xf1]
3680 @ CHECK: uxtah r3, r8, r3, ror #8 @ encoding: [0x18,0xfa,0x93,0xf3]
3683 @ CHECK: uxtah r9, r3, r3, ror #24 @ encoding: [0x13,0xfa,0xb3,0xf9]
|
| /external/llvm/test/MC/ARM/ |
| D | thumb2-dsp-diag.s | 21 uxtah r0, r0, r0 label
31 @ CHECK-7EM: uxtah r0, r0, r0 @ encoding: [0x10,0xfa,0x80,0xf0]
|
| D | basic-arm-instructions.s | 3469 uxtah r1, r3, r9
3471 uxtah r3, r8, r3, ror #8
3473 uxtah r9, r3, r3, ror #24
3475 @ CHECK: uxtah r1, r3, r9 @ encoding: [0x79,0x10,0xf3,0xe6]
3477 @ CHECK: uxtah r3, r8, r3, ror #8 @ encoding: [0x73,0x34,0xf8,0xe6]
3479 @ CHECK: uxtah r9, r3, r3, ror #24 @ encoding: [0x73,0x9c,0xf3,0xe6]
|
| D | basic-thumb2-instructions.s | 3613 uxtah r1, r3, r9
3616 uxtah r3, r8, r3, ror #8
3619 uxtah r9, r3, r3, ror #24
3621 @ CHECK: uxtah r1, r3, r9 @ encoding: [0x13,0xfa,0x89,0xf1]
3624 @ CHECK: uxtah r3, r8, r3, ror #8 @ encoding: [0x18,0xfa,0x93,0xf3]
3627 @ CHECK: uxtah r9, r3, r3, ror #24 @ encoding: [0x13,0xfa,0xb3,0xf9]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | unpredictable-AExtI-arm.txt | 56 # CHECK: uxtah
|
| D | basic-arm-instructions.txt | 2461 # CHECK: uxtah r1, r3, r9
2463 # CHECK: uxtah r3, r8, r3, ror #8
2465 # CHECK: uxtah r9, r3, r3, ror #24
|
| D | thumb2.txt | 2614 # CHECK: uxtah r1, r3, r9
2617 # CHECK: uxtah r3, r8, r3, ror #8
2620 # CHECK: uxtah r9, r3, r3, ror #24
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | unpredictable-AExtI-arm.txt | 56 # CHECK: uxtah
|
| D | basic-arm-instructions.txt | 2461 # CHECK: uxtah r1, r3, r9
2463 # CHECK: uxtah r3, r8, r3, ror #8
2465 # CHECK: uxtah r9, r3, r3, ror #24
|
| D | thumb2.txt | 2614 # CHECK: uxtah r1, r3, r9
2617 # CHECK: uxtah r3, r8, r3, ror #8
2620 # CHECK: uxtah r9, r3, r3, ror #24
|
| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-uxt_rot.ll | 50 ; A8: uxtah r0, r0, r1, ror #8
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 966 0x79,0x10,0xf3,0xe6 = uxtah r1, r3, r9
968 0x73,0x34,0xf8,0xe6 = uxtah r3, r8, r3, ror #8
970 0x73,0x9c,0xf3,0xe6 = uxtah r9, r3, r3, ror #24
|
| D | basic-thumb2-instructions.s.cs | 1169 0x13,0xfa,0x89,0xf1 = uxtah r1, r3, r9
1172 0x18,0xfa,0x93,0xf3 = uxtah r3, r8, r3, ror #8
1175 0x13,0xfa,0xb3,0xf9 = uxtah r9, r3, r3, ror #24
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2551 uxtah r1, r3, r9
2553 uxtah r3, r8, r3, ror #8
2555 uxtah r9, r3, r3, ror #24
2557 @ CHECK: uxtah r1, r3, r9 @ encoding: [0x79,0x10,0xf3,0xe6]
2559 @ CHECK: uxtah r3, r8, r3, ror #8 @ encoding: [0x73,0x34,0xf8,0xe6]
2561 @ CHECK: uxtah r9, r3, r3, ror #24 @ encoding: [0x73,0x9c,0xf3,0xe6]
|
| D | basic-thumb2-instructions.s | 3116 uxtah r1, r3, r9
3119 uxtah r3, r8, r3, ror #8
3122 uxtah r9, r3, r3, ror #24
3124 @ CHECK: uxtah r1, r3, r9 @ encoding: [0x13,0xfa,0x89,0xf1]
3127 @ CHECK: uxtah r3, r8, r3, ror #8 @ encoding: [0x18,0xfa,0x93,0xf3]
3130 @ CHECK: uxtah r9, r3, r3, ror #24 @ encoding: [0x13,0xfa,0xb3,0xf9]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2288 # CHECK: uxtah r1, r3, r9
2290 # CHECK: uxtah r3, r8, r3, ror #8
2292 # CHECK: uxtah r9, r3, r3, ror #24
|
| D | thumb2.txt | 2463 # CHECK: uxtah r1, r3, r9
2466 # CHECK: uxtah r3, r8, r3, ror #8
2469 # CHECK: uxtah r9, r3, r3, ror #24
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-operand-rm-t32.cc | 77 M(uxtah) \
|
| D | test-assembler-cond-rd-rn-operand-rm-a32.cc | 77 M(uxtah) \
|
| /external/v8/src/arm/ |
| D | assembler-arm.h | 895 void uxtah(Register dst, Register src1, Register src2, int rotate = 0,
|