1; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s --check-prefix=CHECK-DSP 2; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m3 %s -o - | FileCheck %s --check-prefix=CHECK-NO-DSP 3; RUN: llc -mtriple=thumbv7em-eabi %s -o - | FileCheck %s -check-prefix=CHECK-DSP 4; RUN: llc -mtriple=thumbv8m.main-none-eabi %s -o - | FileCheck %s -check-prefix=CHECK-NO-DSP 5; RUN: llc -mtriple=thumbv8m.main-none-eabi -mattr=+dsp %s -o - | FileCheck %s -check-prefix=CHECK-DSP 6; rdar://11318438 7 8define zeroext i8 @test1(i32 %A.u) { 9; CHECK-LABEL: test1: 10; CHECK-DSP: uxtb r0, r0 11; CHECK-NO-DSP: uxtb r0, r0 12 %B.u = trunc i32 %A.u to i8 13 ret i8 %B.u 14} 15 16define zeroext i32 @test2(i32 %A.u, i32 %B.u) { 17; CHECK-LABEL: test2: 18; CHECK-DSP: uxtab r0, r0, r1 19; CHECK-NO-DSP-NOT: uxtab 20 %C.u = trunc i32 %B.u to i8 21 %D.u = zext i8 %C.u to i32 22 %E.u = add i32 %A.u, %D.u 23 ret i32 %E.u 24} 25 26define zeroext i32 @test3(i32 %A.u) { 27; CHECK-LABEL: test3: 28; CHECK-DSP: ubfx r0, r0, #8, #16 29; CHECK-NO-DSP: ubfx r0, r0, #8, #16 30 %B.u = lshr i32 %A.u, 8 31 %C.u = shl i32 %A.u, 24 32 %D.u = or i32 %B.u, %C.u 33 %E.u = trunc i32 %D.u to i16 34 %F.u = zext i16 %E.u to i32 35 ret i32 %F.u 36} 37 38define i32 @test4(i32 %A, i32 %X) { 39; CHECK-LABEL: test4: 40; CHECK-DSP: uxtab r0, r0, r1, ror #16 41; CHECK-NO-DSP-NOT: uxtab 42 %X.hi = lshr i32 %X, 16 43 %X.trunc = trunc i32 %X.hi to i8 44 %addend = zext i8 %X.trunc to i32 45 %sum = add i32 %A, %addend 46 ret i32 %sum 47} 48 49define i32 @test5(i32 %A, i32 %X) { 50; CHECK-LABEL: test5: 51; CHECK-DSP: uxtah r0, r0, r1, ror #8 52; CHECK-NO-DSP-NOT: uxtah 53 %X.hi = lshr i32 %X, 8 54 %X.trunc = trunc i32 %X.hi to i16 55 %addend = zext i16 %X.trunc to i32 56 %sum = add i32 %A, %addend 57 ret i32 %sum 58} 59 60define i32 @test6(i32 %A, i32 %X) { 61; CHECK-LABEL: test6: 62; CHECK-DSP: uxtab r0, r0, r1, ror #8 63; CHECK-NO-DSP-NOT: uxtab 64 %X.hi = lshr i32 %X, 8 65 %X.trunc = trunc i32 %X.hi to i8 66 %addend = zext i8 %X.trunc to i32 67 %sum = add i32 %A, %addend 68 ret i32 %sum 69} 70 71define i32 @test7(i32 %A, i32 %X) { 72; CHECK-LABEL: test7: 73; CHECK-DSP: uxtah r0, r0, r1, ror #24 74; CHECK-NO-DSP-NOT: uxtah 75 %lshr = lshr i32 %X, 24 76 %shl = shl i32 %X, 8 77 %or = or i32 %lshr, %shl 78 %trunc = trunc i32 %or to i16 79 %zext = zext i16 %trunc to i32 80 %add = add i32 %A, %zext 81 ret i32 %add 82} 83 84define i32 @test8(i32 %A, i32 %X) { 85; CHECK-LABEL: test8: 86; CHECK-DSP: uxtah r0, r0, r1, ror #24 87; CHECK-NO-DSP-NOT: uxtah 88 %lshr = lshr i32 %X, 24 89 %shl = shl i32 %X, 8 90 %or = or i32 %lshr, %shl 91 %and = and i32 %or, 65535 92 %add = add i32 %A, %and 93 ret i32 %add 94} 95