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/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/
Dthumb2-uxtb.ll6 ; ARMv7A: uxtb16 r0, r0
17 ; ARMv7A: uxtb16 r0, r0, ror #8
29 ; ARMv7A: uxtb16 r0, r0, ror #8
41 ; ARMv7A: uxtb16 r0, r0, ror #8
53 ; ARMv7A: uxtb16 r0, r0, ror #8
65 ; ARMv7A: uxtb16 r0, r0, ror #16
80 ; ARMv7A: uxtb16 r0, r0, ror #16
95 ; ARMv7A: uxtb16 r0, r0, ror #24
109 ; ARMv7A: uxtb16 r0, r0, ror #24
126 ; ARMv7A: uxtb16 r1, r1
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-uxtb.ll6 ; ARMv7A: uxtb16 r0, r0
17 ; ARMv7A: uxtb16 r0, r0, ror #8
29 ; ARMv7A: uxtb16 r0, r0, ror #8
41 ; ARMv7A: uxtb16 r0, r0, ror #8
53 ; ARMv7A: uxtb16 r0, r0, ror #8
65 ; ARMv7A: uxtb16 r0, r0, ror #16
80 ; ARMv7A: uxtb16 r0, r0, ror #16
95 ; ARMv7A: uxtb16 r0, r0, ror #24
109 ; ARMv7A: uxtb16 r0, r0, ror #24
126 ; ARMv7A: uxtb16 r1, r1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/
Dthumb2-uxtb.ll9 ; CHECK-DSP: uxtb16 r0, r0
18 ; CHECK-DSP: uxtb16 r0, r0, ror #8
28 ; CHECK-DSP: uxtb16 r0, r0, ror #8
38 ; CHECK-DSP: uxtb16 r0, r0, ror #8
48 ; CHECK-DSP: uxtb16 r0, r0, ror #8
58 ; CHECK-DSP: uxtb16 r0, r0, ror #16
71 ; CHECK-DSP: uxtb16 r0, r0, ror #16
84 ; CHECK-DSP: uxtb16 r0, r0, ror #24
96 ; CHECK-DSP: uxtb16 r0, r0, ror #24
111 ; CHECK-DSP: uxtb16 r1, r1
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dthumb2-dsp-diag.s23 uxtb16 r0, r0 label
24 uxtb16 r0, r0, ror #8 label
33 @ CHECK-7EM: uxtb16 r0, r0 @ encoding: [0x3f,0xfa,0x80,0xf0]
34 @ CHECK-7EM: uxtb16 r0, r0, ror #8 @ encoding: [0x3f,0xfa,0x90,0xf0]
Dbasic-arm-instructions.s3502 uxtb16 r1, r4
3503 uxtb16 r6, r7, ror #0
3505 uxtb16 r3, r1, ror #16
3508 @ CHECK: uxtb16 r1, r4 @ encoding: [0x74,0x10,0xcf,0xe6]
3509 @ CHECK: uxtb16 r6, r7 @ encoding: [0x77,0x60,0xcf,0xe6]
3511 @ CHECK: uxtb16 r3, r1, ror #16 @ encoding: [0x71,0x38,0xcf,0xe6]
Dbasic-thumb2-instructions.s3711 uxtb16 r1, r4
3712 uxtb16 r6, r7, ror #0
3715 uxtb16 r3, r1, ror #16
3719 @ CHECK: uxtb16 r1, r4 @ encoding: [0x3f,0xfa,0x84,0xf1]
3720 @ CHECK: uxtb16 r6, r7 @ encoding: [0x3f,0xfa,0x87,0xf6]
3723 @ CHECK: uxtb16 r3, r1, ror #16 @ encoding: [0x3f,0xfa,0xa1,0xf3]
/external/llvm/test/MC/ARM/
Dthumb2-dsp-diag.s23 uxtb16 r0, r0 label
24 uxtb16 r0, r0, ror #8 label
33 @ CHECK-7EM: uxtb16 r0, r0 @ encoding: [0x3f,0xfa,0x80,0xf0]
34 @ CHECK-7EM: uxtb16 r0, r0, ror #8 @ encoding: [0x3f,0xfa,0x90,0xf0]
Dbasic-arm-instructions.s3500 uxtb16 r1, r4
3501 uxtb16 r6, r7, ror #0
3503 uxtb16 r3, r1, ror #16
3506 @ CHECK: uxtb16 r1, r4 @ encoding: [0x74,0x10,0xcf,0xe6]
3507 @ CHECK: uxtb16 r6, r7 @ encoding: [0x77,0x60,0xcf,0xe6]
3509 @ CHECK: uxtb16 r3, r1, ror #16 @ encoding: [0x71,0x38,0xcf,0xe6]
Dbasic-thumb2-instructions.s3655 uxtb16 r1, r4
3656 uxtb16 r6, r7, ror #0
3659 uxtb16 r3, r1, ror #16
3663 @ CHECK: uxtb16 r1, r4 @ encoding: [0x3f,0xfa,0x84,0xf1]
3664 @ CHECK: uxtb16 r6, r7 @ encoding: [0x3f,0xfa,0x87,0xf6]
3667 @ CHECK: uxtb16 r3, r1, ror #16 @ encoding: [0x3f,0xfa,0xa1,0xf3]
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dinlineasm.ll4 %tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 ) ; <i32> [#uses=1]
/external/llvm/test/CodeGen/ARM/
Dinlineasm.ll4 %tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 ) ; <i32> [#uses=1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dunpredictable-AExtI-arm.txt46 # CHECK: uxtb16
Dthumb-tests.txt296 # CHECK: uxtb16 r9, r12, ror #16
/external/llvm/test/MC/Disassembler/ARM/
Dunpredictable-AExtI-arm.txt46 # CHECK: uxtb16
Dthumb-tests.txt296 # CHECK: uxtb16 r9, r12, ror #16
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dinlineasm.ll4 %tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 ) ; <i32> [#uses=1]
Dacle-intrinsics.ll64 ; CHECK: uxtb16 r0, r0
68 %tmp3 = call i32 @llvm.arm.uxtb16(i32 %tmp2)
430 declare i32 @llvm.arm.uxtb16(i32)
/external/v8/src/arm/
Dcodegen-arm.cc235 __ uxtb16(temp3, temp1); in CreateMemCopyUint16Uint8Function()
236 __ uxtb16(temp4, temp1, 8); in CreateMemCopyUint16Uint8Function()
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dthumb-tests.txt293 # CHECK: uxtb16 r9, r12, ror #16
Dbasic-arm-instructions.txt2319 # CHECK: uxtb16 r1, r4
2320 # CHECK: uxtb16 r6, r7
2322 # CHECK: uxtb16 r3, r1, ror #16
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs976 0x74,0x10,0xcf,0xe6 = uxtb16 r1, r4
977 0x77,0x60,0xcf,0xe6 = uxtb16 r6, r7
979 0x71,0x38,0xcf,0xe6 = uxtb16 r3, r1, ror #16
Dbasic-thumb2-instructions.s.cs1184 0x3f,0xfa,0x84,0xf1 = uxtb16 r1, r4
1185 0x3f,0xfa,0x87,0xf6 = uxtb16 r6, r7
1188 0x3f,0xfa,0xa1,0xf3 = uxtb16 r3, r1, ror #16
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s2582 uxtb16 r1, r4
2583 uxtb16 r6, r7, ror #0
2585 uxtb16 r3, r1, ror #16
2588 @ CHECK: uxtb16 r1, r4 @ encoding: [0x74,0x10,0xcf,0xe6]
2589 @ CHECK: uxtb16 r6, r7 @ encoding: [0x77,0x60,0xcf,0xe6]
2591 @ CHECK: uxtb16 r3, r1, ror #16 @ encoding: [0x71,0x38,0xcf,0xe6]
Dbasic-thumb2-instructions.s3158 uxtb16 r1, r4
3159 uxtb16 r6, r7, ror #0
3162 uxtb16 r3, r1, ror #16
3166 @ CHECK: uxtb16 r1, r4 @ encoding: [0x3f,0xfa,0x84,0xf1]
3167 @ CHECK: uxtb16 r6, r7 @ encoding: [0x3f,0xfa,0x87,0xf6]
3170 @ CHECK: uxtb16 r3, r1, ror #16 @ encoding: [0x3f,0xfa,0xa1,0xf3]
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-operand-rn-t32.cc64 M(uxtb16) \

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