1; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s -check-prefix=CHECK-DSP 2; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m3 %s -o - | FileCheck %s -check-prefix=CHECK-NO-DSP 3; RUN: llc -mtriple=thumbv7em-eabi %s -o - | FileCheck %s -check-prefix=CHECK-DSP 4; RUN: llc -mtriple=thumbv8m.main-none-eabi %s -o - | FileCheck %s -check-prefix=CHECK-NO-DSP 5; RUN: llc -mtriple=thumbv8m.main-none-eabi -mattr=+dsp %s -o - | FileCheck %s -check-prefix=CHECK-DSP 6 7define i32 @test1(i32 %x) { 8; CHECK-LABEL: test1 9; CHECK-DSP: uxtb16 r0, r0 10; CHECK-NO-DSP: bic r0, r0, #-16711936 11 %tmp1 = and i32 %x, 16711935 ; <i32> [#uses=1] 12 ret i32 %tmp1 13} 14 15; PR7503 16define i32 @test2(i32 %x) { 17; CHECK-LABEL: test2 18; CHECK-DSP: uxtb16 r0, r0, ror #8 19; CHECK-NO-DSP: mov.w r1, #16711935 20; CHECK-NO-DSP: and.w r0, r1, r0, lsr #8 21 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1] 22 %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1] 23 ret i32 %tmp2 24} 25 26define i32 @test3(i32 %x) { 27; CHECK-LABEL: test3 28; CHECK-DSP: uxtb16 r0, r0, ror #8 29; CHECK-NO-DSP: mov.w r1, #16711935 30; CHECK-NO-DSP: and.w r0, r1, r0, lsr #8 31 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1] 32 %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1] 33 ret i32 %tmp2 34} 35 36define i32 @test4(i32 %x) { 37; CHECK-LABEL: test4 38; CHECK-DSP: uxtb16 r0, r0, ror #8 39; CHECK-NO-DSP: mov.w r1, #16711935 40; CHECK-NO-DSP: and.w r0, r1, r0, lsr #8 41 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1] 42 %tmp6 = and i32 %tmp1, 16711935 ; <i32> [#uses=1] 43 ret i32 %tmp6 44} 45 46define i32 @test5(i32 %x) { 47; CHECK-LABEL: test5 48; CHECK-DSP: uxtb16 r0, r0, ror #8 49; CHECK-NO-DSP: mov.w r1, #16711935 50; CHECK-NO-DSP: and.w r0, r1, r0, lsr #8 51 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1] 52 %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1] 53 ret i32 %tmp2 54} 55 56define i32 @test6(i32 %x) { 57; CHECK-LABEL: test6 58; CHECK-DSP: uxtb16 r0, r0, ror #16 59; CHECK-NO-DSP: mov.w r1, #16711935 60; CHECK-NO-DSP: and.w r0, r1, r0, ror #16 61 %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1] 62 %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1] 63 %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1] 64 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1] 65 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1] 66 ret i32 %tmp6 67} 68 69define i32 @test7(i32 %x) { 70; CHECK-LABEL: test7 71; CHECK-DSP: uxtb16 r0, r0, ror #16 72; CHECK-NO-DSP: mov.w r1, #16711935 73; CHECK-NO-DSP: and.w r0, r1, r0, ror #16 74 %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1] 75 %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1] 76 %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1] 77 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1] 78 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1] 79 ret i32 %tmp6 80} 81 82define i32 @test8(i32 %x) { 83; CHECK-LABEL: test8 84; CHECK-DSP: uxtb16 r0, r0, ror #24 85; CHECK-NO-DSP: mov.w r1, #16711935 86; CHECK-NO-DSP: and.w r0, r1, r0, ror #24 87 %tmp1 = shl i32 %x, 8 ; <i32> [#uses=1] 88 %tmp2 = and i32 %tmp1, 16711680 ; <i32> [#uses=1] 89 %tmp5 = lshr i32 %x, 24 ; <i32> [#uses=1] 90 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1] 91 ret i32 %tmp6 92} 93 94define i32 @test9(i32 %x) { 95; CHECK-LABEL: test9 96; CHECK-DSP: uxtb16 r0, r0, ror #24 97; CHECK-NO-DSP: mov.w r1, #16711935 98; CHECK-NO-DSP: and.w r0, r1, r0, ror #24 99 %tmp1 = lshr i32 %x, 24 ; <i32> [#uses=1] 100 %tmp4 = shl i32 %x, 8 ; <i32> [#uses=1] 101 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1] 102 %tmp6 = or i32 %tmp5, %tmp1 ; <i32> [#uses=1] 103 ret i32 %tmp6 104} 105 106define i32 @test10(i32 %p0) { 107; CHECK-LABEL: test10 108; CHECK-DSP: mov.w r1, #16253176 109; CHECK-DSP: and.w r0, r1, r0, lsr #7 110; CHECK-DSP: lsrs r1, r0, #5 111; CHECK-DSP: uxtb16 r1, r1 112; CHECk-DSP: adds r0, r1 113 114; CHECK-NO-DSP: mov.w r1, #16253176 115; CHECK-NO-DSP: and.w r0, r1, r0, lsr #7 116; CHECK-NO-DSP: mov.w r1, #458759 117; CHECK-NO-DSP: and.w r1, r1, r0, lsr #5 118; CHECK-NO-DSP: add r0, r1 119 %tmp1 = lshr i32 %p0, 7 ; <i32> [#uses=1] 120 %tmp2 = and i32 %tmp1, 16253176 ; <i32> [#uses=2] 121 %tmp4 = lshr i32 %tmp2, 5 ; <i32> [#uses=1] 122 %tmp5 = and i32 %tmp4, 458759 ; <i32> [#uses=1] 123 %tmp7 = or i32 %tmp5, %tmp2 ; <i32> [#uses=1] 124 ret i32 %tmp7 125} 126