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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvfloatintrinsics.ll7 %v2f32 = type <2 x float>
9 define %v2f32 @test_v2f32.sqrt(%v2f32 %a) {
11 %1 = call %v2f32 @llvm.sqrt.v2f32(%v2f32 %a)
12 ret %v2f32 %1
15 define %v2f32 @test_v2f32.powi(%v2f32 %a, i32 %b) {
17 %1 = call %v2f32 @llvm.powi.v2f32(%v2f32 %a, i32 %b)
18 ret %v2f32 %1
21 define %v2f32 @test_v2f32.sin(%v2f32 %a) {
23 %1 = call %v2f32 @llvm.sin.v2f32(%v2f32 %a)
24 ret %v2f32 %1
[all …]
Dvcvt-v8.ll14 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> %tmp1)
30 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> %tmp1)
46 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> %tmp1)
62 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> %tmp1)
78 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> %tmp1)
94 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtnu.v2i32.v2f32(<2 x float> %tmp1)
110 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtpu.v2i32.v2f32(<2 x float> %tmp1)
126 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtmu.v2i32.v2f32(<2 x float> %tmp1)
131 declare <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float>) nounwind readnone
133 declare <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float>) nounwind readnone
[all …]
Dvrec.ll23 %tmp2 = call <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float> %tmp1)
38 declare <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float>) nounwind readnone
46 %tmp3 = call <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
59 declare <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
82 %tmp2 = call <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float> %tmp1)
97 declare <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float>) nounwind readnone
105 %tmp3 = call <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
118 declare <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
Dfabs-neon.ll14 %foo = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
17 declare <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
42 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
53 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
/external/llvm/test/CodeGen/AArch64/
Darm64-vfloatintrinsics.ll5 %v2f32 = type <2 x float>
7 define %v2f32 @test_v2f32.sqrt(%v2f32 %a) {
9 %1 = call %v2f32 @llvm.sqrt.v2f32(%v2f32 %a)
10 ret %v2f32 %1
13 define %v2f32 @test_v2f32.powi(%v2f32 %a, i32 %b) {
15 %1 = call %v2f32 @llvm.powi.v2f32(%v2f32 %a, i32 %b)
16 ret %v2f32 %1
19 define %v2f32 @test_v2f32.sin(%v2f32 %a) {
21 %1 = call %v2f32 @llvm.sin.v2f32(%v2f32 %a)
22 ret %v2f32 %1
[all …]
Darm64-vcvt.ll8 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtas.v2i32.v2f32(<2 x float> %A)
30 declare <2 x i32> @llvm.aarch64.neon.fcvtas.v2i32.v2f32(<2 x float>) nounwind readnone
39 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtau.v2i32.v2f32(<2 x float> %A)
61 declare <2 x i32> @llvm.aarch64.neon.fcvtau.v2i32.v2f32(<2 x float>) nounwind readnone
70 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtms.v2i32.v2f32(<2 x float> %A)
92 declare <2 x i32> @llvm.aarch64.neon.fcvtms.v2i32.v2f32(<2 x float>) nounwind readnone
101 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float> %A)
123 declare <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float>) nounwind readnone
132 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtps.v2i32.v2f32(<2 x float> %A)
154 declare <2 x i32> @llvm.aarch64.neon.fcvtps.v2i32.v2f32(<2 x float>) nounwind readnone
[all …]
Darm64-fminv.ll6 %min = call float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float> %in)
24 declare float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float>)
31 %max = call float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float> %in)
49 declare float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float>)
56 %minnm = call float @llvm.aarch64.neon.fminnmv.f32.v2f32(<2 x float> %in)
74 declare float @llvm.aarch64.neon.fminnmv.f32.v2f32(<2 x float>)
81 %maxnm = call float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float> %in)
99 declare float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float>)
Dsincospow-vector-expansion.ll39 %1 = call <2 x float> @llvm.cos.v2f32(<2 x float> %v1)
47 %1 = call <2 x float> @llvm.sin.v2f32(<2 x float> %v1)
55 %1 = call <2 x float> @llvm.pow.v2f32(<2 x float> %v1, <2 x float> %v2)
59 declare <2 x float> @llvm.cos.v2f32(<2 x float>)
60 declare <2 x float> @llvm.sin.v2f32(<2 x float>)
61 declare <2 x float> @llvm.pow.v2f32(<2 x float>, <2 x float>)
/external/llvm/test/CodeGen/ARM/
Dvfloatintrinsics.ll7 %v2f32 = type <2 x float>
9 define %v2f32 @test_v2f32.sqrt(%v2f32 %a) {
11 %1 = call %v2f32 @llvm.sqrt.v2f32(%v2f32 %a)
12 ret %v2f32 %1
15 define %v2f32 @test_v2f32.powi(%v2f32 %a, i32 %b) {
17 %1 = call %v2f32 @llvm.powi.v2f32(%v2f32 %a, i32 %b)
18 ret %v2f32 %1
21 define %v2f32 @test_v2f32.sin(%v2f32 %a) {
23 %1 = call %v2f32 @llvm.sin.v2f32(%v2f32 %a)
24 ret %v2f32 %1
[all …]
Dvcvt-v8.ll14 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> %tmp1)
30 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> %tmp1)
46 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> %tmp1)
62 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> %tmp1)
78 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> %tmp1)
94 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtnu.v2i32.v2f32(<2 x float> %tmp1)
110 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtpu.v2i32.v2f32(<2 x float> %tmp1)
126 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtmu.v2i32.v2f32(<2 x float> %tmp1)
131 declare <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float>) nounwind readnone
133 declare <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float>) nounwind readnone
[all …]
Dvrec.ll23 %tmp2 = call <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float> %tmp1)
38 declare <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float>) nounwind readnone
46 %tmp3 = call <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
59 declare <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
82 %tmp2 = call <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float> %tmp1)
97 declare <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float>) nounwind readnone
105 %tmp3 = call <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
118 declare <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
Dfabs-neon.ll14 %foo = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
17 declare <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
42 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
53 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-vfloatintrinsics.ll6 %v2f32 = type <2 x float>
11 define %v2f32 @test_v2f32.sqrt(%v2f32 %a) {
13 %1 = call %v2f32 @llvm.sqrt.v2f32(%v2f32 %a)
14 ret %v2f32 %1
41 define %v2f32 @test_v2f32.powi(%v2f32 %a, i32 %b) {
43 %1 = call %v2f32 @llvm.powi.v2f32(%v2f32 %a, i32 %b)
44 ret %v2f32 %1
47 define %v2f32 @test_v2f32.sin(%v2f32 %a) {
49 %1 = call %v2f32 @llvm.sin.v2f32(%v2f32 %a)
50 ret %v2f32 %1
[all …]
Darm64-vcvt.ll8 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtas.v2i32.v2f32(<2 x float> %A)
30 declare <2 x i32> @llvm.aarch64.neon.fcvtas.v2i32.v2f32(<2 x float>) nounwind readnone
39 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtau.v2i32.v2f32(<2 x float> %A)
61 declare <2 x i32> @llvm.aarch64.neon.fcvtau.v2i32.v2f32(<2 x float>) nounwind readnone
70 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtms.v2i32.v2f32(<2 x float> %A)
92 declare <2 x i32> @llvm.aarch64.neon.fcvtms.v2i32.v2f32(<2 x float>) nounwind readnone
101 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float> %A)
123 declare <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float>) nounwind readnone
132 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtps.v2i32.v2f32(<2 x float> %A)
154 declare <2 x i32> @llvm.aarch64.neon.fcvtps.v2i32.v2f32(<2 x float>) nounwind readnone
[all …]
Darm64-fminv.ll6 %min = call float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float> %in)
24 declare float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float>)
31 %max = call float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float> %in)
49 declare float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float>)
56 %minnm = call float @llvm.aarch64.neon.fminnmv.f32.v2f32(<2 x float> %in)
74 declare float @llvm.aarch64.neon.fminnmv.f32.v2f32(<2 x float>)
81 %maxnm = call float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float> %in)
99 declare float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float>)
Dsincospow-vector-expansion.ll39 %1 = call <2 x float> @llvm.cos.v2f32(<2 x float> %v1)
47 %1 = call <2 x float> @llvm.sin.v2f32(<2 x float> %v1)
55 %1 = call <2 x float> @llvm.pow.v2f32(<2 x float> %v1, <2 x float> %v2)
59 declare <2 x float> @llvm.cos.v2f32(<2 x float>)
60 declare <2 x float> @llvm.sin.v2f32(<2 x float>)
61 declare <2 x float> @llvm.pow.v2f32(<2 x float>, <2 x float>)
/external/clang/test/Sema/
Darm_vfma.c6 void func(float32x2_t v2f32, float32x4_t v4f32) { in func() argument
7 vfma_f32(v2f32, v2f32, v2f32); in func()
10 vfms_f32(v2f32, v2f32, v2f32); in func()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dcos-intrinsic.ll6 declare <2 x float> @llvm.cos.v2f32(<2 x float> %Val)
9 declare <2 x float> @llvm.fabs.v2f32(<2 x float> %Val)
43 ; CHECK-NEXT: [[COS:%.*]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[X:%.*]])
47 %cos = call <2 x float> @llvm.cos.v2f32(<2 x float> %x.fneg)
74 ; CHECK-NEXT: [[COS:%.*]] = call <2 x float> @llvm.cos.v2f32(<2 x float> [[X:%.*]])
77 %x.fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %x)
79 %cos = call <2 x float> @llvm.cos.v2f32(<2 x float> %x.fabs.fneg)
/external/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp215 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
218 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
223 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
224 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, in getCastInstrCost()
225 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, in getCastInstrCost()
226 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
227 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, in getCastInstrCost()
228 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, in getCastInstrCost()
256 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
259 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Scalarizer/
Dintrinsics.ll4 declare <2 x float> @llvm.sqrt.v2f32(<2 x float>)
7 declare <2 x float> @llvm.minnum.v2f32(<2 x float>, <2 x float>)
10 declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>)
19 declare <2 x float> @llvm.powi.v2f32(<2 x float>, i32)
28 %sqrt = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %x)
39 %minnum = call <2 x float> @llvm.minnum.v2f32(<2 x float> %x, <2 x float> %y)
50 %fma = call <2 x float> @llvm.fma.v2f32(<2 x float> %x, <2 x float> %y, <2 x float> %z)
83 %powi = call <2 x float> @llvm.powi.v2f32(<2 x float> %x, i32 %y)
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvrec.ll23 %tmp2 = call <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float> %tmp1)
38 declare <2 x float> @llvm.arm.neon.vrecpe.v2f32(<2 x float>) nounwind readnone
46 %tmp3 = call <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
59 declare <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
82 %tmp2 = call <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float> %tmp1)
97 declare <2 x float> @llvm.arm.neon.vrsqrte.v2f32(<2 x float>) nounwind readnone
105 %tmp3 = call <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
118 declare <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
Dvcvt.ll71 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float> %tmp1, i32 1)
79 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float> %tmp1, i32 1)
87 %tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1)
95 %tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1)
99 declare <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float>, i32) nounwind readnone
100 declare <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float>, i32) nounwind readnone
101 declare <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
102 declare <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMCallingConv.td31 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
49 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
63 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
75 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
91 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
138 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
148 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
163 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
175 CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp318 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
321 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, in getCastInstrCost()
326 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
327 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, in getCastInstrCost()
328 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, in getCastInstrCost()
329 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, in getCastInstrCost()
330 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, in getCastInstrCost()
331 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, in getCastInstrCost()
359 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
362 { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dadjust-writemask-invalid-copy.ll10 …%tmp = call <2 x float> @llvm.amdgcn.image.getlod.1d.v2f32.f32(i32 3, float undef, <8 x i32> undef…
26 …%tmp = call <2 x float> @llvm.amdgcn.image.getlod.1d.v2f32.f32(i32 3, float undef, <8 x i32> undef…
42 …%tmp = call <2 x float> @llvm.amdgcn.image.sample.1d.v2f32.f32(i32 3, float undef, <8 x i32> undef…
58 …%tmp = call <2 x float> @llvm.amdgcn.image.sample.1d.v2f32.f32(i32 3, float undef, <8 x i32> undef…
79 declare <2 x float> @llvm.amdgcn.image.sample.1d.v2f32.f32(i32, float, <8 x i32>, <4 x i32>, i1, i3…
80 declare <2 x float> @llvm.amdgcn.image.getlod.1d.v2f32.f32(i32, float, <8 x i32>, <4 x i32>, i1, i3…

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