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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvfloatintrinsics.ll131 %v4f32 = type <4 x float>
133 define %v4f32 @test_v4f32.sqrt(%v4f32 %a) {
135 %1 = call %v4f32 @llvm.sqrt.v4f32(%v4f32 %a)
136 ret %v4f32 %1
139 define %v4f32 @test_v4f32.powi(%v4f32 %a, i32 %b) {
141 %1 = call %v4f32 @llvm.powi.v4f32(%v4f32 %a, i32 %b)
142 ret %v4f32 %1
145 define %v4f32 @test_v4f32.sin(%v4f32 %a) {
147 %1 = call %v4f32 @llvm.sin.v4f32(%v4f32 %a)
148 ret %v4f32 %1
[all …]
D2011-11-29-128bitArithmetics.ll20 %1 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %0)
25 declare <4 x float> @llvm.sqrt.v4f32(<4 x float>) nounwind readonly
52 %1 = call <4 x float> @llvm.cos.v4f32(<4 x float> %0)
57 declare <4 x float> @llvm.cos.v4f32(<4 x float>) nounwind readonly
83 %1 = call <4 x float> @llvm.exp.v4f32(<4 x float> %0)
88 declare <4 x float> @llvm.exp.v4f32(<4 x float>) nounwind readonly
114 %1 = call <4 x float> @llvm.exp2.v4f32(<4 x float> %0)
119 declare <4 x float> @llvm.exp2.v4f32(<4 x float>) nounwind readonly
145 %1 = call <4 x float> @llvm.log10.v4f32(<4 x float> %0)
150 declare <4 x float> @llvm.log10.v4f32(<4 x float>) nounwind readonly
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-vfloatintrinsics.ll129 %v4f32 = type <4 x float>
131 define %v4f32 @test_v4f32.sqrt(%v4f32 %a) {
133 %1 = call %v4f32 @llvm.sqrt.v4f32(%v4f32 %a)
134 ret %v4f32 %1
137 define %v4f32 @test_v4f32.powi(%v4f32 %a, i32 %b) {
139 %1 = call %v4f32 @llvm.powi.v4f32(%v4f32 %a, i32 %b)
140 ret %v4f32 %1
143 define %v4f32 @test_v4f32.sin(%v4f32 %a) {
145 %1 = call %v4f32 @llvm.sin.v4f32(%v4f32 %a)
146 ret %v4f32 %1
[all …]
/external/llvm/test/CodeGen/ARM/
Dvfloatintrinsics.ll131 %v4f32 = type <4 x float>
133 define %v4f32 @test_v4f32.sqrt(%v4f32 %a) {
135 %1 = call %v4f32 @llvm.sqrt.v4f32(%v4f32 %a)
136 ret %v4f32 %1
139 define %v4f32 @test_v4f32.powi(%v4f32 %a, i32 %b) {
141 %1 = call %v4f32 @llvm.powi.v4f32(%v4f32 %a, i32 %b)
142 ret %v4f32 %1
145 define %v4f32 @test_v4f32.sin(%v4f32 %a) {
147 %1 = call %v4f32 @llvm.sin.v4f32(%v4f32 %a)
148 ret %v4f32 %1
[all …]
D2011-11-29-128bitArithmetics.ll20 %1 = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %0)
25 declare <4 x float> @llvm.sqrt.v4f32(<4 x float>) nounwind readonly
52 %1 = call <4 x float> @llvm.cos.v4f32(<4 x float> %0)
57 declare <4 x float> @llvm.cos.v4f32(<4 x float>) nounwind readonly
83 %1 = call <4 x float> @llvm.exp.v4f32(<4 x float> %0)
88 declare <4 x float> @llvm.exp.v4f32(<4 x float>) nounwind readonly
114 %1 = call <4 x float> @llvm.exp2.v4f32(<4 x float> %0)
119 declare <4 x float> @llvm.exp2.v4f32(<4 x float>) nounwind readonly
145 %1 = call <4 x float> @llvm.log10.v4f32(<4 x float> %0)
150 declare <4 x float> @llvm.log10.v4f32(<4 x float>) nounwind readonly
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-vfloatintrinsics.ll345 %v4f32 = type <4 x float>
347 define %v4f32 @test_v4f32.sqrt(%v4f32 %a) {
349 %1 = call %v4f32 @llvm.sqrt.v4f32(%v4f32 %a)
350 ret %v4f32 %1
353 define %v4f32 @test_v4f32.powi(%v4f32 %a, i32 %b) {
355 %1 = call %v4f32 @llvm.powi.v4f32(%v4f32 %a, i32 %b)
356 ret %v4f32 %1
359 define %v4f32 @test_v4f32.sin(%v4f32 %a) {
361 %1 = call %v4f32 @llvm.sin.v4f32(%v4f32 %a)
362 ret %v4f32 %1
[all …]
/external/swiftshader/third_party/subzero/crosstest/
Dtest_calling_conv.cpp40 v4f32 arg1 = {0, 1, 2, 3}; in caller_vlvilvfvdviv()
42 v4f32 arg3 = {6, 7, 8, 9}; in caller_vlvilvfvdviv()
45 v4f32 arg6 = {12, 13, 14, 15}; in caller_vlvilvfvdviv()
47 v4f32 arg8 = {17, 18, 19, 20}; in caller_vlvilvfvdviv()
49 v4f32 arg10 = {22, 23, 24, 25}; in caller_vlvilvfvdviv()
51 v4f32 arg12 = {27, 28, 29, 30}; in caller_vlvilvfvdviv()
79 callee_vlvilvfvdviv(v4f32 arg1, int64 arg2, v4f32 arg3, int arg4, int64 arg5, in callee_vlvilvfvdviv()
80 v4f32 arg6, float arg7, v4f32 arg8, double arg9, in callee_vlvilvfvdviv()
81 v4f32 arg10, int arg11, v4f32 arg12) { in callee_vlvilvfvdviv()
Dtest_calling_conv.h35 typedef void(callee_vlvilvfvdviv_Ty)(v4f32, int64, v4f32, int, int64, v4f32,
36 float, v4f32, double, v4f32, int, v4f32);
Dtest_arith.h47 v4f32 myFrem(v4f32 a, v4f32 b);
52 v4f32 test##inst(v4f32 a, v4f32 b);
62 v4f32 myFabs(v4f32 a);
/external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/useful-harnesses/
Dvecoperations.c6 typedef float v4f32 __attribute__((ext_vector_type(4))); typedef
54 void print_v4f32(const char *str, v4f32 v) { in print_v4f32()
101 v4f32 v4f32_shuffle_1(v4f32 a) { in v4f32_shuffle_1()
102 v4f32 c2 = a.yzwx; in v4f32_shuffle_1()
106 v4f32 v4f32_shuffle_2(v4f32 a) { in v4f32_shuffle_2()
107 v4f32 c2 = a.zwxy; in v4f32_shuffle_2()
111 v4f32 v4f32_shuffle_3(v4f32 a) { in v4f32_shuffle_3()
112 v4f32 c2 = a.wxyz; in v4f32_shuffle_3()
116 v4f32 v4f32_shuffle_4(v4f32 a) { in v4f32_shuffle_4()
117 v4f32 c2 = a.xyzw; in v4f32_shuffle_4()
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCInstrQPX.td78 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::v4f32;
83 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::v4f32;
88 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::v4f32;
121 [(set v4f32:$FRT, (fadd v4f32:$FRA, v4f32:$FRB))]>;
132 [(set v4f32:$FRT, (fsub v4f32:$FRA, v4f32:$FRB))]>;
142 [(set v4f32:$FRT, (PPCfre v4f32:$FRB))]>;
151 [(set v4f32:$FRT, (PPCfrsqrte v4f32:$FRB))]>;
164 [(set v4f32:$FRT, (fmul v4f32:$FRA, v4f32:$FRC))]>;
179 [(set v4f32:$FRT, (fma v4f32:$FRA, v4f32:$FRC, v4f32:$FRB))]>;
190 [(set v4f32:$FRT, (fneg (fma v4f32:$FRA, v4f32:$FRC,
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrQPX.td78 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::v4f32;
83 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::v4f32;
88 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::v4f32;
121 [(set v4f32:$FRT, (fadd v4f32:$FRA, v4f32:$FRB))]>;
132 [(set v4f32:$FRT, (fsub v4f32:$FRA, v4f32:$FRB))]>;
142 [(set v4f32:$FRT, (PPCfre v4f32:$FRB))]>;
151 [(set v4f32:$FRT, (PPCfrsqrte v4f32:$FRB))]>;
164 [(set v4f32:$FRT, (fmul v4f32:$FRA, v4f32:$FRC))]>;
179 [(set v4f32:$FRT, (fma v4f32:$FRA, v4f32:$FRC, v4f32:$FRB))]>;
190 [(set v4f32:$FRT, (fneg (fma v4f32:$FRA, v4f32:$FRC,
[all …]
/external/clang/test/Sema/
Darm_vfma.c6 void func(float32x2_t v2f32, float32x4_t v4f32) { in func() argument
8 vfmaq_f32(v4f32, v4f32, v4f32); in func()
11 vfmsq_f32(v4f32, v4f32, v4f32); in func()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.image.dim.ll9 …%v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32 15, i32 %s, <8 x i32> %rsrc, i32 0,…
17 …%v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i32(i32 15, i32 %s, i32 %t, <8 x i32> %rsrc…
25 …%v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %r, <8 x i3…
33 …%v = call <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %slice, <…
41 …%v = call <4 x float> @llvm.amdgcn.image.load.1darray.v4f32.i32(i32 15, i32 %s, i32 %slice, <8 x i…
49 …%v = call <4 x float> @llvm.amdgcn.image.load.2darray.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %slice…
57 …%v = call <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %fragid…
65 …%v = call <4 x float> @llvm.amdgcn.image.load.2darraymsaa.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %s…
73 …%v = call <4 x float> @llvm.amdgcn.image.load.mip.1d.v4f32.i32(i32 15, i32 %s, i32 %mip, <8 x i32>…
81 …%v = call <4 x float> @llvm.amdgcn.image.load.mip.2d.v4f32.i32(i32 15, i32 %s, i32 %t, i32 %mip, <…
[all …]
Dllvm.amdgcn.image.sample.o.dim.ll8 …%v = call <4 x float> @llvm.amdgcn.image.sample.o.1d.v4f32.f32(i32 15, i32 %offset, float %s, <8 x…
16 …%v = call <4 x float> @llvm.amdgcn.image.sample.o.2d.v4f32.f32(i32 15, i32 %offset, float %s, floa…
24 …%v = call <4 x float> @llvm.amdgcn.image.sample.c.o.1d.v4f32.f32(i32 15, i32 %offset, float %zcomp…
32 …%v = call <4 x float> @llvm.amdgcn.image.sample.c.o.2d.v4f32.f32(i32 15, i32 %offset, float %zcomp…
40 …%v = call <4 x float> @llvm.amdgcn.image.sample.cl.o.1d.v4f32.f32(i32 15, i32 %offset, float %s, f…
48 …%v = call <4 x float> @llvm.amdgcn.image.sample.cl.o.2d.v4f32.f32(i32 15, i32 %offset, float %s, f…
56 …%v = call <4 x float> @llvm.amdgcn.image.sample.c.cl.o.1d.v4f32.f32(i32 15, i32 %offset, float %zc…
64 …%v = call <4 x float> @llvm.amdgcn.image.sample.c.cl.o.2d.v4f32.f32(i32 15, i32 %offset, float %zc…
72 …%v = call <4 x float> @llvm.amdgcn.image.sample.b.o.1d.v4f32.f32.f32(i32 15, i32 %offset, float %b…
80 …%v = call <4 x float> @llvm.amdgcn.image.sample.b.o.2d.v4f32.f32.f32(i32 15, i32 %offset, float %b…
[all …]
Dllvm.amdgcn.image.sample.dim.ll8 …%v = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 15, float %s, <8 x i32> %rsrc, <4…
16 …%v = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32(i32 15, float %s, float %t, <8 x i32>…
24 …%v = call <4 x float> @llvm.amdgcn.image.sample.3d.v4f32.f32(i32 15, float %s, float %t, float %r,…
32 …%v = call <4 x float> @llvm.amdgcn.image.sample.cube.v4f32.f32(i32 15, float %s, float %t, float %…
40 …%v = call <4 x float> @llvm.amdgcn.image.sample.1darray.v4f32.f32(i32 15, float %s, float %slice, …
48 …%v = call <4 x float> @llvm.amdgcn.image.sample.2darray.v4f32.f32(i32 15, float %s, float %t, floa…
56 …%v = call <4 x float> @llvm.amdgcn.image.sample.c.1d.v4f32.f32(i32 15, float %zcompare, float %s, …
64 …%v = call <4 x float> @llvm.amdgcn.image.sample.c.2d.v4f32.f32(i32 15, float %zcompare, float %s, …
72 …%v = call <4 x float> @llvm.amdgcn.image.sample.cl.1d.v4f32.f32(i32 15, float %s, float %clamp, <8…
80 …%v = call <4 x float> @llvm.amdgcn.image.sample.cl.2d.v4f32.f32(i32 15, float %s, float %t, float …
[all …]
Dllvm.amdgcn.image.gather4.dim.ll8 …%v = call <4 x float> @llvm.amdgcn.image.gather4.2d.v4f32.f32(i32 1, float %s, float %t, <8 x i32>…
16 …%v = call <4 x float> @llvm.amdgcn.image.gather4.cube.v4f32.f32(i32 1, float %s, float %t, float %…
24 …%v = call <4 x float> @llvm.amdgcn.image.gather4.2darray.v4f32.f32(i32 1, float %s, float %t, floa…
32 …%v = call <4 x float> @llvm.amdgcn.image.gather4.c.2d.v4f32.f32(i32 1, float %zcompare, float %s, …
40 …%v = call <4 x float> @llvm.amdgcn.image.gather4.cl.2d.v4f32.f32(i32 1, float %s, float %t, float …
48 …%v = call <4 x float> @llvm.amdgcn.image.gather4.c.cl.2d.v4f32.f32(i32 1, float %zcompare, float %…
56 …%v = call <4 x float> @llvm.amdgcn.image.gather4.b.2d.v4f32.f32.f32(i32 1, float %bias, float %s, …
64 …%v = call <4 x float> @llvm.amdgcn.image.gather4.c.b.2d.v4f32.f32.f32(i32 1, float %bias, float %z…
72 …%v = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.2d.v4f32.f32.f32(i32 1, float %bias, float %…
80 …%v = call <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.2d.v4f32.f32.f32(i32 1, float %bias, float…
[all …]
Dllvm.amdgcn.image.sample.ltolz.ll9 …%v = call <4 x float> @llvm.amdgcn.image.sample.l.1d.v4f32.f32(i32 15, float %s, float 0.0, <8 x i…
17 …%v = call <4 x float> @llvm.amdgcn.image.sample.l.2d.v4f32.f32(i32 15, float %s, float %t, float -…
25 …%v = call <4 x float> @llvm.amdgcn.image.sample.c.l.1d.v4f32.f32(i32 15, float %zcompare, float %s…
33 …%v = call <4 x float> @llvm.amdgcn.image.sample.c.l.2d.v4f32.f32(i32 15, float %zcompare, float %s…
41 …%v = call <4 x float> @llvm.amdgcn.image.sample.l.o.1d.v4f32.f32(i32 15, i32 %offset, float %s, fl…
49 …%v = call <4 x float> @llvm.amdgcn.image.sample.l.o.2d.v4f32.f32(i32 15, i32 %offset, float %s, fl…
57 …%v = call <4 x float> @llvm.amdgcn.image.sample.c.l.o.1d.v4f32.f32(i32 15, i32 %offset, float %zco…
65 …%v = call <4 x float> @llvm.amdgcn.image.sample.c.l.o.2d.v4f32.f32(i32 15, i32 %offset, float %zco…
73 …%v = call <4 x float> @llvm.amdgcn.image.gather4.l.2d.v4f32.f32(i32 15, float %s, float %t, float …
81 …%v = call <4 x float> @llvm.amdgcn.image.gather4.c.l.2d.v4f32.f32(i32 15, float %zcompare, float %…
[all …]
Dllvm.amdgcn.image.gather4.o.dim.ll8 …%v = call <4 x float> @llvm.amdgcn.image.gather4.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, floa…
16 …%v = call <4 x float> @llvm.amdgcn.image.gather4.c.o.2d.v4f32.f32(i32 1, i32 %offset, float %zcomp…
24 …%v = call <4 x float> @llvm.amdgcn.image.gather4.cl.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, f…
32 …%v = call <4 x float> @llvm.amdgcn.image.gather4.c.cl.o.2d.v4f32.f32(i32 1, i32 %offset, float %zc…
40 …%v = call <4 x float> @llvm.amdgcn.image.gather4.b.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float %b…
48 …%v = call <4 x float> @llvm.amdgcn.image.gather4.c.b.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float …
56 …%v = call <4 x float> @llvm.amdgcn.image.gather4.b.cl.o.2d.v4f32.f32.f32(i32 1, i32 %offset, float…
64 …%v = call <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.o.2d.v4f32.f32.f32(i32 1, i32 %offset, flo…
72 …%v = call <4 x float> @llvm.amdgcn.image.gather4.l.o.2d.v4f32.f32(i32 1, i32 %offset, float %s, fl…
80 …%v = call <4 x float> @llvm.amdgcn.image.gather4.c.l.o.2d.v4f32.f32(i32 1, i32 %offset, float %zco…
[all …]
/external/clang/test/CodeGen/
Dvectorcall.c56 typedef float __attribute__((vector_size(16))) v4f32; typedef
57 struct HVA2 { v4f32 x, y; };
58 struct HVA4 { v4f32 w, x, y, z; };
64 void __vectorcall hva2(struct HVA4 a, struct HVA4 b, v4f32 c) {} in hva2()
68 void __vectorcall hva3(v4f32 a, v4f32 b, v4f32 c, v4f32 d, v4f32 e, struct HVA2 f) {} in hva3()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Instrumentation/AddressSanitizer/
Dasan-masked-load-store.ll13 @v4f32 = global <4 x float>* zeroinitializer, align 8
18 declare void @llvm.masked.store.v4f32.p0v4f32(<4 x float>, <4 x float>*, i32, <4 x i1>) argmemonly …
22 define void @store.v4f32.1110(<4 x float> %arg) sanitize_address {
23 ; ALL-LABEL: @store.v4f32.1110
24 %p = load <4 x float>*, <4 x float>** @v4f32, align 8
35 ; STORE: tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, …
36 …tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1>…
73 define void @store.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) sanitize_address {
74 ; ALL-LABEL: @store.v4f32.variable
75 %p = load <4 x float>*, <4 x float>** @v4f32, align 8
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dvec-round-02.ll1 ; Test v4f32 rounding on z14.
11 declare <4 x float> @llvm.rint.v4f32(<4 x float>)
12 declare <4 x float> @llvm.nearbyint.v4f32(<4 x float>)
13 declare <4 x float> @llvm.floor.v4f32(<4 x float>)
14 declare <4 x float> @llvm.ceil.v4f32(<4 x float>)
15 declare <4 x float> @llvm.trunc.v4f32(<4 x float>)
16 declare <4 x float> @llvm.round.v4f32(<4 x float>)
22 %res = call <4 x float> @llvm.rint.v4f32(<4 x float> %val)
30 %res = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %val)
38 %res = call <4 x float> @llvm.floor.v4f32(<4 x float> %val)
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUMathInstr.td60 // f32, v4f32 divide instruction sequence:
80 def Interpv4f32: CodeFrag<(FIv4f32 (v4f32 VECREG:$rB), (FRESTv4f32 (v4f32 VECREG:$rB)))>;
82 def DivEstv4f32: CodeFrag<(FMv4f32 (v4f32 VECREG:$rA), Interpv4f32.Fragment)>;
85 (v4f32 VECREG:$rB),
86 (v4f32 VECREG:$rA)),
92 def : Pat<(fdiv (v4f32 VECREG:$rA), (v4f32 VECREG:$rB)),
95 (CGTIv4f32 (FNMSv4f32 (v4f32 VECREG:$rB),
97 (v4f32 VECREG:$rA)), -1))>;
/external/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.buffer.store.format.ll10 …call void @llvm.amdgcn.buffer.store.format.v4f32(<4 x float> %1, <4 x i32> %0, i32 0, i32 0, i1 0,…
11 …call void @llvm.amdgcn.buffer.store.format.v4f32(<4 x float> %2, <4 x i32> %0, i32 0, i32 0, i1 1,…
12 …call void @llvm.amdgcn.buffer.store.format.v4f32(<4 x float> %3, <4 x i32> %0, i32 0, i32 0, i1 0,…
20 …call void @llvm.amdgcn.buffer.store.format.v4f32(<4 x float> %1, <4 x i32> %0, i32 0, i32 42, i1 0…
28 …call void @llvm.amdgcn.buffer.store.format.v4f32(<4 x float> %1, <4 x i32> %0, i32 %2, i32 0, i1 0…
36 …call void @llvm.amdgcn.buffer.store.format.v4f32(<4 x float> %1, <4 x i32> %0, i32 0, i32 %2, i1 0…
44 …call void @llvm.amdgcn.buffer.store.format.v4f32(<4 x float> %1, <4 x i32> %0, i32 %2, i32 %3, i1 …
53 …call void @llvm.amdgcn.buffer.store.format.v4f32(<4 x float> %1, <4 x i32> %0, i32 %3, i32 %2, i1 …
67 …call void @llvm.amdgcn.buffer.store.format.v4f32(<4 x float> %1, <4 x i32> %0, i32 %2, i32 0, i1 0…
68 …%data = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> %0, i32 %3, i32 0, i1 0, …
[all …]
Dllvm.amdgcn.buffer.store.ll10 call void @llvm.amdgcn.buffer.store.v4f32(<4 x float> %1, <4 x i32> %0, i32 0, i32 0, i1 0, i1 0)
11 call void @llvm.amdgcn.buffer.store.v4f32(<4 x float> %2, <4 x i32> %0, i32 0, i32 0, i1 1, i1 0)
12 call void @llvm.amdgcn.buffer.store.v4f32(<4 x float> %3, <4 x i32> %0, i32 0, i32 0, i1 0, i1 1)
20 call void @llvm.amdgcn.buffer.store.v4f32(<4 x float> %1, <4 x i32> %0, i32 0, i32 42, i1 0, i1 0)
28 call void @llvm.amdgcn.buffer.store.v4f32(<4 x float> %1, <4 x i32> %0, i32 %2, i32 0, i1 0, i1 0)
36 call void @llvm.amdgcn.buffer.store.v4f32(<4 x float> %1, <4 x i32> %0, i32 0, i32 %2, i1 0, i1 0)
44 …call void @llvm.amdgcn.buffer.store.v4f32(<4 x float> %1, <4 x i32> %0, i32 %2, i32 %3, i1 0, i1 0)
53 …call void @llvm.amdgcn.buffer.store.v4f32(<4 x float> %1, <4 x i32> %0, i32 %3, i32 %2, i1 0, i1 0)
67 call void @llvm.amdgcn.buffer.store.v4f32(<4 x float> %1, <4 x i32> %0, i32 %2, i32 0, i1 0, i1 0)
68 %data = call <4 x float> @llvm.amdgcn.buffer.load.v4f32(<4 x i32> %0, i32 %3, i32 0, i1 0, i1 0)
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