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/external/strace/xlat/
Dblock_ioctl_cmds.in1 BLKROSET _IO(0x12, 93)
2 BLKROGET _IO(0x12, 94)
3 BLKRRPART _IO(0x12, 95)
4 BLKGETSIZE _IO(0x12, 96)
5 BLKFLSBUF _IO(0x12, 97)
6 BLKRASET _IO(0x12, 98)
7 BLKRAGET _IO(0x12, 99)
8 BLKFRASET _IO(0x12, 100)
9 BLKFRAGET _IO(0x12, 101)
10 BLKSECTSET _IO(0x12, 102)
[all …]
/external/libhevc/common/arm64/
Dihevc_inter_pred_chroma_horz_w16out.s132 sub x12,x0,#2 //pu1_src - 2
134 add x4,x12,x2 //pu1_src_tmp2_8 = pu1_src + src_strd
174 add x4,x12,x2
177 and x0, x12, #31
178 add x20,x12, x2 , lsl #1
186 add x19,x12,#8
187 ld1 { v0.2s},[x12],x11 //vector load pu1_src
191 ld1 { v2.2s},[x12],x11 //vector load pu1_src
196 ld1 { v4.2s},[x12],x11 //vector load pu1_src
201 ld1 { v6.2s},[x12],x9 //vector load pu1_src
[all …]
Dihevc_inter_pred_filters_luma_horz.s145 sub x12,x0,#3 //pu1_src - 3
147 add x4,x12,x2 //pu1_src_tmp2_8 = pu1_src + src_strd
186 sub x12,x0,#3 //pu1_src - 3
190 add x12, x12,#16
198 add x4,x12,x2 //pu1_src + src_strd
204 ld1 {v0.2s},[x12],x11 //vector load pu1_src
205 ld1 {v1.2s},[x12],x11
206 ld1 {v2.2s},[x12],x11
207 ld1 {v3.2s},[x12],x11
228 ld1 {v4.2s},[x12],x11
[all …]
Dihevc_inter_pred_chroma_horz.s132 sub x12,x0,#2 //pu1_src - 2
134 add x4,x12,x2 //pu1_src_tmp2_8 = pu1_src + src_strd
164 add x4,x12,x2
166 and x0, x12, #31
169 add x20,x12, x2 , lsl #1
174 add x19,x12,#8
175 ld1 { v0.2s},[x12],x11 //vector load pu1_src
180 ld1 { v2.2s},[x12],x11 //vector load pu1_src
183 ld1 { v4.2s},[x12],x11 //vector load pu1_src
186 ld1 { v6.2s},[x12],x9 //vector load pu1_src
[all …]
Dihevc_intra_pred_chroma_horz.s104 add x12,x0,x6 //*pu1_ref[four_nt]
114 sub x12,x12,#16 //move to 16th value pointer
118 ld1 { v0.8h},[x12] //load 16 values. d1[7] will have the 1st value.
119 sub x12,x12,#16
120 ld1 { v18.8h},[x12] //load 16 values. d1[7] will have the 1st value.
176 sub x12,x12,#16 //move to 16th value pointer
196 ldrb w14,[x12],#1 //pu1_ref[two_nt]
201 sub x12,x12,#17
202 ld1 { v0.16b},[x12]
204 sub x12,x12,#16
[all …]
Dihevc_intra_pred_luma_horz.s107 add x12,x0,x6 //*pu1_ref[two_nt]
116 sub x12,x12,#16 //move to 16th value pointer
120 ld1 { v0.16b},[x12] //load 16 values. d1[7] will have the 1st value.
176 sub x12,x12,#16 //move to 16th value pointer
196 ldrb w14,[x12],#1 //pu1_ref[two_nt]
198 ld1 { v30.8b},[x12],#8 //pu1_ref[two_nt + 1 + col]
199 ld1 { v31.8b},[x12] //pu1_ref[two_nt + 1 + col]
200 sub x12,x12,#8
203 sub x12,x12,#17
204 ld1 { v0.16b},[x12]
[all …]
Dihevc_sao_edge_offset_class0_chroma.s123 MOV x12,x9 //Move wd to x12 for loop count
127 SUBS x12,x12,#8 //Decrement the loop counter by 8
149 MOV x12,#-1 //move -1 to x12
160 MOV x12,x0 //pu1_src_cpy = pu1_src
165 LD1 {v19.16b},[x12],x1 //pu1_cur_row = vld1q_u8(pu1_src_cpy)
174 LD1 {v30.16b},[x12] //II Iteration pu1_cur_row = vld1q_u8(pu1_src_cpy)
178 SUB x12,x12,x1
191 LDRB w11,[x12,#16] //pu1_src_cpy[16]
197 LDRB w11,[x12,#17] //pu1_src_cpy[17]
201 ADD x12,x12,x1
[all …]
Dihevc_intra_pred_filters_chroma_mode_19_to_25.s185 mov x12, #-1
187 sub x20, x9, x12 //count to take care off ref_idx
232 mov x12,x4
238 lsr x12, x4, #4 //divide by 8
241 mul x7, x4, x12
274 add x12,x8,x9 //(ii)*pu1_ref[ref_main_idx]
280 ld1 {v12.8b},[x12],x11 //(ii)ref_main_idx
283 ld1 {v13.8b},[x12] //(ii)ref_main_idx_1
292 add x12,x8,x9 //(iv)*pu1_ref[ref_main_idx]
300 ld1 {v20.8b},[x12],x11 //(iv)ref_main_idx
[all …]
Dihevc_deblk_luma_horz.s130 and x12,x12,#0xff
135 add x12,x12,x2
136 subs x9,x12,x9,lsl #1 // dq0 value is stored in x9
164 add x12,x12,x4
165 subs x12,x12,x3,lsl #1 // dq3value is stored in x12
166 csneg x12,x12,x12,pl
178 add x4,x11,x12 // x4 has the d3 value
185 add x12,x12,x9 // x12 has the value dq
360 cmp x8,x12
375 cmp x8,x12
[all …]
Dihevc_sao_edge_offset_class0.s103 MOV x12,x9 //Move wd to x12 for loop count
111 SUBS x12,x12,#8 //Decrement the loop counter by 8
130 MOV x12,#0xFF //move -1 to x12
140 MOV x12,x0 //pu1_src_cpy = pu1_src
145 LD1 {v17.16b},[x12],x1 //pu1_cur_row = vld1q_u8(pu1_src_cpy)
152 LD1 {v26.16b},[x12] //II Iteration pu1_cur_row = vld1q_u8(pu1_src_cpy)
164 SUB x12,x12,x1 //Decrement the pu1_src pointer by src_strd
168 LDRB w11,[x12,#16] //pu1_src_cpy[16]
172 ADD x12,x12,x1 //Increment the pu1_src pointer by src_strd
176 LDRB w11,[x12,#16] //II pu1_src_cpy[16]
[all …]
Dihevc_intra_pred_luma_mode_27_to_33.s124 mov x12,x4
130 lsr x12, x4, #3 //divide by 8
133 mul x7, x4, x12
167 add x12,x8,x9 //(ii)*pu1_ref[ref_main_idx]
173 ld1 {v12.8b},[x12],x11 //(ii)ref_main_idx
176 ld1 {v13.8b},[x12] //(ii)ref_main_idx_1
186 add x12,x8,x9 //(iv)*pu1_ref[ref_main_idx]
194 ld1 {v20.8b},[x12],x11 //(iv)ref_main_idx
197 ld1 {v21.8b},[x12] //(iv)ref_main_idx_1
226 add x12,x8,x9 //(vi)*pu1_ref[ref_main_idx]
[all …]
Dihevc_intra_pred_chroma_mode_27_to_33.s119 mov x12,x4
127 lsr x12, x4, #4 //divide by 8
130 mul x7, x4, x12
162 add x12,x8,x9 //(ii)*pu1_ref[ref_main_idx]
168 ld1 {v12.8b},[x12],x11 //(ii)ref_main_idx
171 ld1 {v13.8b},[x12] //(ii)ref_main_idx_1
181 add x12,x8,x9 //(iv)*pu1_ref[ref_main_idx]
189 ld1 {v20.8b},[x12],x11 //(iv)ref_main_idx
192 ld1 {v21.8b},[x12] //(iv)ref_main_idx_1
221 add x12,x8,x9 //(vi)*pu1_ref[ref_main_idx]
[all …]
Dihevc_intra_pred_filters_luma_mode_19_to_25.s192 mov x12, #-1
194 sub x20, x9, x12 //count to take care off ref_idx
236 mov x12,x4
242 lsr x12, x4, #3 //divide by 8
245 mul x7, x4, x12
277 add x12,x8,x9 //(ii)*pu1_ref[ref_main_idx]
283 ld1 {v12.8b},[x12],x11 //(ii)ref_main_idx
286 ld1 {v13.8b},[x12] //(ii)ref_main_idx_1
295 add x12,x8,x9 //(iv)*pu1_ref[ref_main_idx]
303 ld1 {v20.8b},[x12],x11 //(iv)ref_main_idx
[all …]
/external/capstone/suite/MC/AArch64/
Dbasic-a64-instructions.s.cs4 0x2c,0x40,0x34,0x8b = add x12, x1, w20, uxtw
24 0x2c,0x40,0x34,0xcb = sub x12, x1, w20, uxtw
40 0x2c,0x40,0x34,0xab = adds x12, x1, w20, uxtw
56 0x2c,0x40,0x34,0xeb = subs x12, x1, w20, uxtw
103 0x9f,0x71,0x2d,0xeb = cmp x12, x13, uxtx #4
266 0x9f,0x01,0x4d,0xab = cmn x12, x13, lsr #0
290 0x9f,0x01,0x4d,0xeb = cmp x12, x13, lsr #0
319 0xec,0x7f,0x8b,0xcb = sub x12, xzr, x11, asr #31
343 0xec,0x7f,0x8b,0xeb = subs x12, xzr, x11, asr #31
619 0x5f,0x31,0x2b,0x9b = smaddl xzr, w10, w11, x12
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dbasic-a64-instructions.s20 add x12, x1, w20, uxtw
66 sub x12, x1, w20, uxtw
101 adds x12, x1, w20, uxtw
136 subs x12, x1, w20, uxtw
241 cmp x12, x13, uxtx #4
659 cmn x12, x13, lsr #0
719 cmp x12, x13, lsr #0
786 neg x12, x11, asr #31
844 negs x12, x11, asr #31
1492 rev64 x13, x12
[all …]
Dbasic-a64-diagnostics.s406 cmn x11, x12, lsr #-1
407 cmn x11, x12, lsr #64
455 cmp x11, x12, lsr #-1
456 cmp x11, x12, lsr #64
504 neg x11, x12, lsr #-1
505 neg x11, x12, lsr #64
553 negs x11, x12, lsr #-1
554 negs x11, x12, lsr #64
850 uxtb x3, x12
1932 ldur x12, [sp, #256]
[all …]
/external/llvm/test/MC/AArch64/
Dbasic-a64-instructions.s20 add x12, x1, w20, uxtw
66 sub x12, x1, w20, uxtw
101 adds x12, x1, w20, uxtw
136 subs x12, x1, w20, uxtw
241 cmp x12, x13, uxtx #4
659 cmn x12, x13, lsr #0
719 cmp x12, x13, lsr #0
786 neg x12, x11, asr #31
844 negs x12, x11, asr #31
1492 rev64 x13, x12
[all …]
Dbasic-a64-diagnostics.s401 cmn x11, x12, lsr #-1
402 cmn x11, x12, lsr #64
450 cmp x11, x12, lsr #-1
451 cmp x11, x12, lsr #64
499 neg x11, x12, lsr #-1
500 neg x11, x12, lsr #64
548 negs x11, x12, lsr #-1
549 negs x11, x12, lsr #64
845 uxtb x3, x12
1901 ldur x12, [sp, #256]
[all …]
/external/pcre/dist2/src/
Dpcre2_chartables.c.dist173 0x00,0x1a,0x1a,0x1a,0x1a,0x1a,0x1a,0x12, /* @ - G */
174 0x12,0x12,0x12,0x12,0x12,0x12,0x12,0x12, /* H - O */
175 0x12,0x12,0x12,0x12,0x12,0x12,0x12,0x12, /* P - W */
176 0x12,0x12,0x12,0x00,0x00,0x00,0x00,0x10, /* X - _ */
177 0x00,0x1a,0x1a,0x1a,0x1a,0x1a,0x1a,0x12, /* ` - g */
178 0x12,0x12,0x12,0x12,0x12,0x12,0x12,0x12, /* h - o */
179 0x12,0x12,0x12,0x12,0x12,0x12,0x12,0x12, /* p - w */
180 0x12,0x12,0x12,0x00,0x00,0x00,0x00,0x00, /* x -127 */
/external/libxaac/decoder/armv8/
Dixheaacd_sbr_qmfsyn64_winadd.s55 MOV x12, x2
70 ADD x12, x12, x6
110 LD1 {v11.4h}, [x12], #8
115 MOV x11, x12
117 ADD x12, x12, #248
120 LD1 {v13.4h}, [x12], x9
125 LD1 {v15.4h}, [x12], x9
130 LD1 {v17.4h}, [x12], x9
135 LD1 {v19.4h}, [x12], x9
139 MOV x12, x11
[all …]
/external/boringssl/ios-aarch64/crypto/fipsmodule/
Darmv8-mont.S74 adds x12,x16,x13
79 adds x12,x12,x6
83 str x12,[x22],#8 // tp[j-1]
91 adds x12,x16,x13
95 adds x12,x12,x6
100 stp x12,x13,[x22]
136 adds x12,x16,x13
146 adds x12,x12,x6
148 str x12,[x22,#-16] // tp[j-1]
158 adds x12,x16,x13
[all …]
/external/boringssl/linux-aarch64/crypto/fipsmodule/
Darmv8-mont.S75 adds x12,x16,x13
80 adds x12,x12,x6
84 str x12,[x22],#8 // tp[j-1]
92 adds x12,x16,x13
96 adds x12,x12,x6
101 stp x12,x13,[x22]
137 adds x12,x16,x13
147 adds x12,x12,x6
149 str x12,[x22,#-16] // tp[j-1]
159 adds x12,x16,x13
[all …]
/external/libvpx/libvpx/vp9/common/x86/
Dvp9_highbd_iht16x16_add_sse4.c60 x10[2], x11[2], x12[2], x13[2], x14[2], x15[2]; in highbd_iadst16_4col_sse4_1() local
99 x12[0] = _mm_sub_epi64(s4[0], s12[0]); in highbd_iadst16_4col_sse4_1()
100 x12[1] = _mm_sub_epi64(s4[1], s12[1]); in highbd_iadst16_4col_sse4_1()
132 x12[0] = dct_const_round_shift_64bit(x12[0]); in highbd_iadst16_4col_sse4_1()
133 x12[1] = dct_const_round_shift_64bit(x12[1]); in highbd_iadst16_4col_sse4_1()
152 x12[0] = pack_4(x12[0], x12[1]); in highbd_iadst16_4col_sse4_1()
178 highbd_iadst_butterfly_sse4_1(x13[0], x12[0], cospi_28_64, cospi_4_64, s13, in highbd_iadst16_4col_sse4_1()
191 x12[0] = _mm_sub_epi64(s8[0], s12[0]); in highbd_iadst16_4col_sse4_1()
192 x12[1] = _mm_sub_epi64(s8[1], s12[1]); in highbd_iadst16_4col_sse4_1()
207 x12[0] = dct_const_round_shift_64bit(x12[0]); in highbd_iadst16_4col_sse4_1()
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt329 # CHECK: cmn x12, x13, lsr #0
379 # CHECK: cmp x12, x13, lsr #0
434 # CHECK: {{sub x12, xzr|neg x12}}, x11, asr #31
484 # CHECK: {{subs x12, xzr|negs x12}}, x11, asr #31
1027 0x12 0x08 0xc0 0x5a
1060 0x12 0x5e 0xdf 0x9a
1167 # CHECK: smaddl xzr, w10, w11, x12
1178 # CHECK: smsubl xzr, w10, w11, x12
1189 # CHECK: umaddl xzr, w10, w11, x12
1200 # CHECK: umsubl xzr, w10, w11, x12
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt330 # CHECK: cmn x12, x13, lsr #0
380 # CHECK: cmp x12, x13, lsr #0
435 # CHECK: {{sub x12, xzr|neg x12}}, x11, asr #31
485 # CHECK: {{subs x12, xzr|negs x12}}, x11, asr #31
1028 0x12 0x08 0xc0 0x5a
1151 # CHECK: smaddl xzr, w10, w11, x12
1162 # CHECK: smsubl xzr, w10, w11, x12
1173 # CHECK: umaddl xzr, w10, w11, x12
1184 # CHECK: umsubl xzr, w10, w11, x12
1216 # CHECK: mul x12, x13, x14
[all …]

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