| /external/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-arm.txt | 4 [0x00,0x22,0x00,0xe1]
5 [0x00,0x32,0x01,0xe1]
6 [0x00,0x52,0x02,0xe1]
7 [0x00,0x72,0x03,0xe1]
8 [0x00,0xb2,0x04,0xe1]
9 [0x00,0x12,0x05,0xe1]
10 [0x00,0x22,0x06,0xe1]
19 [0x00,0x22,0x08,0xe1]
20 [0x00,0x32,0x09,0xe1]
21 [0x00,0x52,0x0a,0xe1]
[all …]
|
| D | load-store-acquire-release-v8.txt | 2 0x9f 0x0e 0xd8 0xe1
3 0x9f 0x1e 0xfc 0xe1
4 0x9f 0x1e 0x90 0xe1
5 0x9f 0x8e 0xbd 0xe1
6 # CHECK: ldaexb r0, [r8] @ encoding: [0x9f,0x0e,0xd8,0xe1]
7 # CHECK: ldaexh r1, [r12] @ encoding: [0x9f,0x1e,0xfc,0xe1]
8 # CHECK: ldaex r1, [r0] @ encoding: [0x9f,0x1e,0x90,0xe1]
9 # CHECK: ldaexd r8, r9, [sp] @ encoding: [0x9f,0x8e,0xbd,0xe1]
11 0x93 0x1e 0xc4 0xe1
12 0x92 0x4e 0xe5 0xe1
[all …]
|
| D | arm-LDREXD-reencoding.txt | 3 0x9f 0x0f 0xb0 0xe1
4 0x9f 0xcf 0xb1 0xe1
5 0x9f 0xcf 0xb3 0xe1
6 0x9f 0x8f 0xbd 0xe1
7 0x9f 0xcf 0xbe 0xe1
9 # CHECK: ldrexd r0, r1, [r0] @ encoding: [0x9f,0x0f,0xb0,0xe1]
10 # CHECK: ldrexd r12, sp, [r1] @ encoding: [0x9f,0xcf,0xb1,0xe1]
11 # CHECK: ldrexd r12, sp, [r3] @ encoding: [0x9f,0xcf,0xb3,0xe1]
12 # CHECK: ldrexd r8, r9, [sp] @ encoding: [0x9f,0x8f,0xbd,0xe1]
13 # CHECK: ldrexd r12, sp, [lr] @ encoding: [0x9f,0xcf,0xbe,0xe1]
|
| D | arm-STREXD-reencoding.txt | 3 0x92 0x1f 0xa0 0xe1
4 0x90 0x4f 0xa3 0xe1
5 0x92 0xdf 0xa4 0xe1
6 0x90 0xaf 0xa6 0xe1
7 0x9c 0x5f 0xa8 0xe1
9 # CHECK: strexd r1, r2, r3, [r0] @ encoding: [0x92,0x1f,0xa0,0xe1]
10 # CHECK: strexd r4, r0, r1, [r3] @ encoding: [0x90,0x4f,0xa3,0xe1]
11 # CHECK: strexd sp, r2, r3, [r4] @ encoding: [0x92,0xdf,0xa4,0xe1]
12 # CHECK: strexd r10, r0, r1, [r6] @ encoding: [0x90,0xaf,0xa6,0xe1]
13 # CHECK: strexd r5, r12, sp, [r8] @ encoding: [0x9c,0x5f,0xa8,0xe1]
|
| D | memory-arm-instructions.txt | 115 0xd0 0x00 0xc5 0xe1
116 0xdf 0x80 0xc2 0xe1
117 0xd0 0x22 0xe9 0xe1
136 0xd3 0x40 0x81 0xe1
137 0xd2 0x40 0xa7 0xe1
150 0xb0 0x30 0xd4 0xe1
151 0xb4 0x20 0xd7 0xe1
152 0xb0 0x14 0xf8 0xe1
170 0xb4 0x60 0x95 0xe1
171 0xbb 0x30 0xb8 0xe1
[all …]
|
| D | basic-arm-instructions.txt | 318 0x06 0xa0 0xc1 0xe1
319 0x06 0xa5 0xc1 0xe1
320 0x26 0xa5 0xc1 0xe1
321 0x26 0xa5 0xc1 0xe1
322 0x46 0xa5 0xc1 0xe1
323 0x66 0xa5 0xc1 0xe1
324 0x18 0x62 0xc7 0xe1
325 0x38 0x62 0xc7 0xe1
326 0x58 0x62 0xc7 0xe1
327 0x78 0x62 0xc7 0xe1
[all …]
|
| D | crc32.txt | 10 0x42 0x00 0x01 0xe1
11 0x42 0x00 0x21 0xe1
12 0x42 0x00 0x41 0xe1
13 0x42 0x02 0x01 0xe1
14 0x42 0x02 0x21 0xe1
15 0x42 0x02 0x41 0xe1
|
| D | virtexts-arm.txt | 3 [0x71,0x00,0x40,0xe1]
4 [0x77,0x00,0x40,0xe1]
5 [0x71,0x10,0x40,0xe1]
6 [0x7f,0xff,0x4f,0xe1]
12 [0x6e,0x00,0x60,0xe1]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-arm.txt | 4 [0x00,0x22,0x00,0xe1]
5 [0x00,0x32,0x01,0xe1]
6 [0x00,0x52,0x02,0xe1]
7 [0x00,0x72,0x03,0xe1]
8 [0x00,0xb2,0x04,0xe1]
9 [0x00,0x12,0x05,0xe1]
10 [0x00,0x22,0x06,0xe1]
19 [0x00,0x22,0x08,0xe1]
20 [0x00,0x32,0x09,0xe1]
21 [0x00,0x52,0x0a,0xe1]
[all …]
|
| D | load-store-acquire-release-v8.txt | 2 0x9f 0x0e 0xd8 0xe1
3 0x9f 0x1e 0xfc 0xe1
4 0x9f 0x1e 0x90 0xe1
5 0x9f 0x8e 0xbd 0xe1
6 # CHECK: ldaexb r0, [r8] @ encoding: [0x9f,0x0e,0xd8,0xe1]
7 # CHECK: ldaexh r1, [r12] @ encoding: [0x9f,0x1e,0xfc,0xe1]
8 # CHECK: ldaex r1, [r0] @ encoding: [0x9f,0x1e,0x90,0xe1]
9 # CHECK: ldaexd r8, r9, [sp] @ encoding: [0x9f,0x8e,0xbd,0xe1]
11 0x93 0x1e 0xc4 0xe1
12 0x92 0x4e 0xe5 0xe1
[all …]
|
| D | arm-LDREXD-reencoding.txt | 3 0x9f 0x0f 0xb0 0xe1
4 0x9f 0xcf 0xb1 0xe1
5 0x9f 0xcf 0xb3 0xe1
6 0x9f 0x8f 0xbd 0xe1
7 0x9f 0xcf 0xbe 0xe1
9 # CHECK: ldrexd r0, r1, [r0] @ encoding: [0x9f,0x0f,0xb0,0xe1]
10 # CHECK: ldrexd r12, sp, [r1] @ encoding: [0x9f,0xcf,0xb1,0xe1]
11 # CHECK: ldrexd r12, sp, [r3] @ encoding: [0x9f,0xcf,0xb3,0xe1]
12 # CHECK: ldrexd r8, r9, [sp] @ encoding: [0x9f,0x8f,0xbd,0xe1]
13 # CHECK: ldrexd r12, sp, [lr] @ encoding: [0x9f,0xcf,0xbe,0xe1]
|
| D | arm-STREXD-reencoding.txt | 3 0x92 0x1f 0xa0 0xe1
4 0x90 0x4f 0xa3 0xe1
5 0x92 0xdf 0xa4 0xe1
6 0x90 0xaf 0xa6 0xe1
7 0x9c 0x5f 0xa8 0xe1
9 # CHECK: strexd r1, r2, r3, [r0] @ encoding: [0x92,0x1f,0xa0,0xe1]
10 # CHECK: strexd r4, r0, r1, [r3] @ encoding: [0x90,0x4f,0xa3,0xe1]
11 # CHECK: strexd sp, r2, r3, [r4] @ encoding: [0x92,0xdf,0xa4,0xe1]
12 # CHECK: strexd r10, r0, r1, [r6] @ encoding: [0x90,0xaf,0xa6,0xe1]
13 # CHECK: strexd r5, r12, sp, [r8] @ encoding: [0x9c,0x5f,0xa8,0xe1]
|
| D | unpredictable-MVN-arm.txt | 13 # CHECK: 0x03 0x20 0xe1 0xe1
14 0x03 0x20 0xe1 0xe1
27 # CHECK: 0x1f 0x57 0xe0 0xe1
28 0x1f 0x57 0xe0 0xe1
32 # CHECK: 0x16 0xf7 0xe0 0xe1
33 0x16 0xf7 0xe0 0xe1
37 # CHECK: 0x16 0x5f 0xe0 0xe1
38 0x16 0x5f 0xe0 0xe1
|
| D | memory-arm-instructions.txt | 115 0xd0 0x00 0xc5 0xe1
116 0xdf 0x80 0xc2 0xe1
117 0xd0 0x22 0xe9 0xe1
136 0xd3 0x40 0x81 0xe1
137 0xd2 0x40 0xa7 0xe1
150 0xb0 0x30 0xd4 0xe1
151 0xb4 0x20 0xd7 0xe1
152 0xb0 0x14 0xf8 0xe1
170 0xb4 0x60 0x95 0xe1
171 0xbb 0x30 0xb8 0xe1
[all …]
|
| D | basic-arm-instructions.txt | 318 0x06 0xa0 0xc1 0xe1
319 0x06 0xa5 0xc1 0xe1
320 0x26 0xa5 0xc1 0xe1
321 0x26 0xa5 0xc1 0xe1
322 0x46 0xa5 0xc1 0xe1
323 0x66 0xa5 0xc1 0xe1
324 0x18 0x62 0xc7 0xe1
325 0x38 0x62 0xc7 0xe1
326 0x58 0x62 0xc7 0xe1
327 0x78 0x62 0xc7 0xe1
[all …]
|
| D | arm-vmrs_vmsr.txt | 41 [0x10,0xfa,0xe1,0xee]
42 [0x10,0x0a,0xe1,0xee]
45 [0x10,0xaa,0xe1,0xee]
46 [0x10,0xda,0xe1,0xee]
49 # CHECK-V7A: vmsr fpscr, r0 @ encoding: [0x10,0x0a,0xe1,0xee]
52 # CHECK-V7A: vmsr fpscr, r10 @ encoding: [0x10,0xaa,0xe1,0xee]
53 # CHECK-V7A: vmsr fpscr, sp @ encoding: [0x10,0xda,0xe1,0xee]
56 # CHECK-V8A: vmsr fpscr, r0 @ encoding: [0x10,0x0a,0xe1,0xee]
59 # CHECK-V8A: vmsr fpscr, r10 @ encoding: [0x10,0xaa,0xe1,0xee]
60 # CHECK-V8A: vmsr fpscr, sp @ encoding: [0x10,0xda,0xe1,0xee]
[all …]
|
| D | crc32.txt | 10 0x42 0x00 0x01 0xe1
11 0x42 0x00 0x21 0xe1
12 0x42 0x00 0x41 0xe1
13 0x42 0x02 0x01 0xe1
14 0x42 0x02 0x21 0xe1
15 0x42 0x02 0x41 0xe1
|
| D | thumb-vmrs_vmsr.txt | 82 [0xe1,0xee,0x10,0xfa]
83 [0xe1,0xee,0x10,0x0a]
86 [0xe1,0xee,0x10,0xaa]
87 [0xe1,0xee,0x10,0xda]
90 # CHECK-V7A: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a]
93 # CHECK-V7A: vmsr fpscr, r10 @ encoding: [0xe1,0xee,0x10,0xaa]
97 # CHECK-V7M: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a]
100 # CHECK-V7M: vmsr fpscr, r10 @ encoding: [0xe1,0xee,0x10,0xaa]
104 # CHECK-V8A: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a]
107 # CHECK-V8A: vmsr fpscr, r10 @ encoding: [0xe1,0xee,0x10,0xaa]
[all …]
|
| D | virtexts-arm.txt | 3 [0x71,0x00,0x40,0xe1]
4 [0x77,0x00,0x40,0xe1]
5 [0x71,0x10,0x40,0xe1]
6 [0x7f,0xff,0x4f,0xe1]
12 [0x6e,0x00,0x60,0xe1]
|
| /external/llvm/test/MC/Disassembler/AMDGPU/ |
| D | mubuf_vi.txt | 237 # VI: buffer_atomic_inc v1, off, s[8:11], 56 ; encoding: [0x00,0x00,0x2c,0xe1,0x00,0x01,0x02,0xb8]
238 0x00 0x00 0x2c 0xe1 0x00 0x01 0x02 0xb8
240 # VI: buffer_atomic_inc v1, off, s[8:11], 56 slc ; encoding: [0x00,0x00,0x2e,0xe1,0x00,0x01,0x02,…
241 0x00 0x00 0x2e 0xe1 0x00 0x01 0x02 0xb8
243 # VI: buffer_atomic_inc v1, off, s[8:11], s4 slc ; encoding: [0x00,0x00,0x2e,0xe1,0x00,0x01,0x02,…
244 0x00 0x00 0x2e 0xe1 0x00 0x01 0x02 0x04
246 # VI: buffer_atomic_inc v1, off, s[8:11], 56 offset:4 ; encoding: [0x04,0x00,0x2c,0xe1,0x00,0x01,…
247 0x04 0x00 0x2c 0xe1 0x00 0x01 0x02 0xb8
249 # VI: buffer_atomic_inc v1, off, s[8:11], 56 offset:4 slc ; encoding: [0x04,0x00,0x2e,0xe1,0x00,0…
250 0x04 0x00 0x2e 0xe1 0x00 0x01 0x02 0xb8
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
| D | mubuf_vi.txt | 243 # VI: buffer_atomic_inc v1, off, s[8:11], 56 ; encoding: [0x00,0x00,0x2c,0xe1,0x00,0x01,0x02,0xb8]
244 0x00 0x00 0x2c 0xe1 0x00 0x01 0x02 0xb8
246 # VI: buffer_atomic_inc v1, off, s[8:11], 56 slc ; encoding: [0x00,0x00,0x2e,0xe1,0x00,0x01,0x02,…
247 0x00 0x00 0x2e 0xe1 0x00 0x01 0x02 0xb8
249 # VI: buffer_atomic_inc v1, off, s[8:11], s4 slc ; encoding: [0x00,0x00,0x2e,0xe1,0x00,0x01,0x02,…
250 0x00 0x00 0x2e 0xe1 0x00 0x01 0x02 0x04
252 # VI: buffer_atomic_inc v1, off, s[8:11], 56 offset:4 ; encoding: [0x04,0x00,0x2c,0xe1,0x00,0x01,…
253 0x04 0x00 0x2c 0xe1 0x00 0x01 0x02 0xb8
255 # VI: buffer_atomic_inc v1, off, s[8:11], 56 offset:4 slc ; encoding: [0x04,0x00,0x2e,0xe1,0x00,0…
256 0x04 0x00 0x2e 0xe1 0x00 0x01 0x02 0xb8
[all …]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | memory-arm-instructions.txt | 115 0xd0 0x00 0xc5 0xe1
116 0xdf 0x80 0xc2 0xe1
117 0xd0 0x22 0xe9 0xe1
136 0xd3 0x40 0x81 0xe1
137 0xd2 0x40 0xa7 0xe1
150 0xb0 0x30 0xd4 0xe1
151 0xb4 0x20 0xd7 0xe1
152 0xb0 0x14 0xf8 0xe1
170 0xb4 0x60 0x95 0xe1
171 0xbb 0x30 0xb8 0xe1
[all …]
|
| D | basic-arm-instructions.txt | 285 0x06 0xa0 0xc1 0xe1
286 0x06 0xa5 0xc1 0xe1
287 0x26 0xa5 0xc1 0xe1
288 0x26 0xa5 0xc1 0xe1
289 0x46 0xa5 0xc1 0xe1
290 0x66 0xa5 0xc1 0xe1
291 0x18 0x62 0xc7 0xe1
292 0x38 0x62 0xc7 0xe1
293 0x58 0x62 0xc7 0xe1
294 0x78 0x62 0xc7 0xe1
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/X86/ |
| D | avx-512.txt | 88 0x62 0xe1 0xff 0x08 0x58 0x42 0x20
92 0x62 0xe1 0x7e 0x08 0x58 0x42 0x40
96 0x62 0xe1 0xfd 0x48 0x58 0x42 0x04
100 0x62 0xe1 0xfd 0x58 0x58 0x42 0x20
104 0x62 0xe1 0x7c 0x58 0x58 0x42 0x40
112 0x62 0xe1 0x7e 0x08 0x58 0x82 0xff 0x00 0x00 0x00
115 0x62 0xe1 0x7e 0x08 0x58 0x82 0x00 0x04 0x00 0x00
307 0x62 0xe1 0xf5 0x10 0x5d 0xda
311 0x62 0xe1 0xf5 0x30 0x5d 0xda
315 0x62 0xe1 0xf5 0x50 0x5d 0xda
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | avx512-gfni-intrinsics.ll | 11 …gf2p8affineinvqb $3, %xmm1, %xmm0, %xmm4 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0x89,0xcf,0xe1,0x03]
21 …gf2p8affineinvqb $3, %xmm1, %xmm0, %xmm4 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0x89,0xcf,0xe1,0x03]
39 ; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
41 …gf2p8affineinvqb $3, %ymm1, %ymm0, %ymm4 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xa9,0xcf,0xe1,0x03]
51 …gf2p8affineinvqb $3, %ymm1, %ymm0, %ymm4 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xa9,0xcf,0xe1,0x03]
69 ; X86-NEXT: kmovq {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf8,0x90,0x4c,0x24,0x04]
71 …gf2p8affineinvqb $3, %zmm1, %zmm0, %zmm4 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xc9,0xcf,0xe1,0x03]
79 ; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]
81 …gf2p8affineinvqb $3, %zmm1, %zmm0, %zmm4 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xc9,0xcf,0xe1,0x03]
101 … vgf2p8affineqb $3, %xmm1, %xmm0, %xmm4 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0x89,0xce,0xe1,0x03]
[all …]
|