1# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi 2>&1 | FileCheck %s 2 3# A8.8.116 MVN (register) 4# MVN(S)<c> <Rd>, <Rm>{, <shift>} 5# 6# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 7# ------------------------------------------------------------------------------------------------- 8# | cond | 0 0| 0| 1 1 1 1| S|(0)(0)(0)(0)| Rd | imm5 |type | 0| Rm | 9# ------------------------------------------------------------------------------------------------- 10 11# MVN r2, r3 ; with bit 16 == 1 => Unpredictable 12# CHECK: potentially undefined 13# CHECK: 0x03 0x20 0xe1 0xe1 140x03 0x20 0xe1 0xe1 15 16# A8.8.117 MVN (register-shifted register) 17# MVN(S)<c> <Rd>, <Rm>, <type> <Rs> 18# 19# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 20# ------------------------------------------------------------------------------------------------- 21# | cond | 0 0| 0| 1 1 1 1| S|(0)(0)(0)(0)| Rd | Rs | 0|type | 1| Rm | 22# ------------------------------------------------------------------------------------------------- 23# if d == 15 || n == 15 || m == 15 then UNPREDICTABLE; 24 25# MVN r5, pc, lsl r7 26# CHECK: potentially undefined 27# CHECK: 0x1f 0x57 0xe0 0xe1 280x1f 0x57 0xe0 0xe1 29 30# MVN pc, r6, lsl r7 31# CHECK: potentially undefined 32# CHECK: 0x16 0xf7 0xe0 0xe1 330x16 0xf7 0xe0 0xe1 34 35# MVN r5, r6, lsl pc 36# CHECK: potentially undefined 37# CHECK: 0x16 0x5f 0xe0 0xe1 380x16 0x5f 0xe0 0xe1 39