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Searched refs:AL (Results 1 – 12 of 12) sorted by relevance

/system/core/libpixelflinger/tests/arch-arm64/assembler/
Darm64_assembler_test.cpp119 EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, AL, NV, enumerator
180 {0xA000,INSTR_ADD,AL,AL,0,1,NA,1,MAX_32BIT ,NA,NA,NA,NA,1,0,0,0},
181 {0xA001,INSTR_ADD,AL,AL,0,1,NA,1,MAX_32BIT -1,NA,NA,NA,NA,1,MAX_32BIT,0,0},
182 {0xA002,INSTR_ADD,AL,AL,0,1,NA,0,NA,MAX_32BIT ,NA,NA,NA,1,0,0,0},
183 {0xA003,INSTR_ADD,AL,AL,0,1,NA,0,NA,MAX_32BIT -1,NA,NA,NA,1,MAX_32BIT,0,0},
184 {0xA004,INSTR_ADD,AL,AL,0,1,NA,0,0,MAX_32BIT ,SHIFT_LSL,0,NA,1,0,0,0},
185 {0xA005,INSTR_ADD,AL,AL,0,1,NA,0,0,MAX_32BIT ,SHIFT_LSL,31,NA,1,0x80000001,0,0},
186 {0xA006,INSTR_ADD,AL,AL,0,1,NA,0,0,3,SHIFT_LSR,1,NA,1,2,0,0},
187 {0xA007,INSTR_ADD,AL,AL,0,1,NA,0,0,MAX_32BIT ,SHIFT_LSR,31,NA,1,2,0,0},
188 {0xA008,INSTR_ADD,AL,AL,0,0,NA,0,0,3,SHIFT_ASR,1,NA,1,1,0,0},
[all …]
/system/core/libpixelflinger/tests/arch-mips64/assembler/
Dmips64_assembler_test.cpp120 EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, AL, NV, enumerator
188 {0xA000,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,1,MAX_32BIT,NA,NA,NA,NA,1,0},
189 {0xA001,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,1,MAX_32BIT-1,NA,NA,NA,NA,1,MAX_64BIT},
190 {0xA002,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,NA,MAX_32BIT,NA,NA,NA,1,0},
191 {0xA003,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,NA,MAX_32BIT-1,NA,NA,NA,1,MAX_64BIT},
192 {0xA004,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,SHIFT_LSL, 0,NA,1,0},
193 {0xA005,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,SHIFT_LSL,31,NA,1,0xFFFFFFFF80000001},
194 {0xA006,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,0,3,SHIFT_LSR,1,NA,1,2},
195 {0xA007,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,SHIFT_LSR,31,NA,1,2},
196 {0xA008,INSTR_ADD,{0,0,0,0,0},AL,0,0,NA,0,0,3,SHIFT_ASR,1,NA,1,1},
[all …]
/system/core/libpixelflinger/codeflinger/
Dload_store.cpp37 if (inc) STR(AL, s.reg, addr.reg, immed12_post(4)); in store()
38 else STR(AL, s.reg, addr.reg); in store()
43 STRB(AL, s.reg, addr.reg, immed12_pre(0)); in store()
44 MOV(AL, 0, s.reg, reg_imm(s.reg, ROR, 8)); in store()
45 STRB(AL, s.reg, addr.reg, immed12_pre(1)); in store()
46 MOV(AL, 0, s.reg, reg_imm(s.reg, ROR, 8)); in store()
47 STRB(AL, s.reg, addr.reg, immed12_pre(2)); in store()
49 MOV(AL, 0, s.reg, reg_imm(s.reg, ROR, 16)); in store()
52 ADD(AL, 0, addr.reg, addr.reg, imm(3)); in store()
55 if (inc) STRH(AL, s.reg, addr.reg, immed8_post(2)); in store()
[all …]
Dtexturing.cpp91 MLA(AL, 0, c, x.reg, dvdx, c); in init_iterated_color()
99 MOV(AL, 0, end, reg_imm(parts.count.reg, LSR, 16)); in init_iterated_color()
100 MLA(AL, 1, end, dvdx, end, c); in init_iterated_color()
102 BIC(AL, 0, c, c, reg_imm(c, ASR, 31)); in init_iterated_color()
159 AND(AL, 0, parts.iterated.reg, in init_iterated_color()
162 MOV(AL, 0, parts.iterated.reg, in init_iterated_color()
203 ADD(AL, 0, dx, fragment.reg, dx); in build_iterated_color()
220 BIC(AL, 0, fragment.reg, fragment.reg, in build_iterated_color()
348 ADD(AL, 0, Rx, Rx, reg_imm(txPtr.reg, ASR, 16)); // x += (s>>16) in init_textures()
350 ADD(AL, 0, Ry, Ry, reg_imm(txPtr.reg, ASR, 16)); // y += (t>>16) in init_textures()
[all …]
DGGLAssembler.cpp207 MOV(AL, 0, parts.count.reg, in scanline_core()
209 ADD(AL, 0, parts.count.reg, parts.count.reg, in scanline_core()
211 MOV(AL, 0, parts.count.reg, in scanline_core()
264 AND(AL, 0, parts.dither.reg, parts.count.reg, imm(mask)); in scanline_core()
265 ADDR_ADD(AL, 0, parts.dither.reg, ctxtReg, parts.dither.reg); in scanline_core()
266 LDRB(AL, parts.dither.reg, parts.dither.reg, in scanline_core()
323 SUB(AL, S, parts.count.reg, parts.count.reg, imm(1<<16)); in scanline_core()
338 ADDR_ADD(AL, 0, parts.cbPtr.reg, parts.cbPtr.reg, imm(parts.cbPtr.size>>3)); in scanline_core()
340 SUB(AL, S, parts.count.reg, parts.count.reg, imm(1<<16)); in scanline_core()
365 SUB(AL, 0, parts.count.reg, parts.count.reg, Rx); in build_scanline_prolog()
[all …]
Dblending.cpp49 LDRB(AL, fogColor.reg, mBuilderContext.Rctx, in build_fog()
57 BIC(AL, 0, factor.reg, factor.reg, reg_imm(factor.reg, ASR, 31)); in build_fog()
58 CMP(AL, factor.reg, imm( 0x10000 )); in build_fog()
140 MOV(AL, 0, temp.reg, reg_imm(temp.reg, LSR, temp.l)); in build_blending()
150 MOV(AL, 0, fragment.reg, reg_imm(temp.reg, LSR, temp.l)); in build_blending()
300 RSB(AL, 0, factor.reg, factor.reg, imm((1<<factor.s))); in build_blend_factor()
333 ADD(AL, 0, factor.reg, fb.reg, reg_imm(fb.reg, LSR, fb.s-1)); in build_blend_factor()
338 ADD(AL, 0, factor.reg, fragment.reg, in build_blend_factor()
344 ADD(AL, 0, factor.reg, src_alpha.reg, in build_blend_factor()
351 ADD(AL, 0, factor.reg, factor.reg, in build_blend_factor()
[all …]
DArm64Assembler.cpp412 if(cc != AL) in dataProcessing()
453 if(cc != AL) in dataProcessing()
465 if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required in ADDR_ADD()
500 if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required in ADDR_SUB()
520 if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required in MLA()
528 if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required in MUL()
605 if(cc != AL) in dataTransfer()
615 if(cc != AL) in dataTransfer()
622 if(cc != AL) in dataTransfer()
684 if(cc != AL || dir != IA || W == 0 || Rn != SP) in LDM()
[all …]
DGGLAssembler.h35 ADDR_LDR(AL, REG, mBuilderContext.Rctx, immed12_pre(GGL_OFFSETOF(FIELD)))
38 ADDR_STR(AL, REG, mBuilderContext.Rctx, immed12_pre(GGL_OFFSETOF(FIELD)))
41 LDR(AL, REG, mBuilderContext.Rctx, immed12_pre(GGL_OFFSETOF(FIELD)))
44 STR(AL, REG, mBuilderContext.Rctx, immed12_pre(GGL_OFFSETOF(FIELD)))
144 mGen.STR(mGen.AL, reg, mGen.SP, mGen.immed12_pre(-4, 1)); in Spill()
146 mGen.STM(mGen.AL, mGen.DB, mGen.SP, 1, mRegList); in Spill()
156 mGen.LDR(mGen.AL, reg, mGen.SP, mGen.immed12_post(4)); in ~Spill()
158 mGen.LDM(mGen.AL, mGen.IA, mGen.SP, 1, mRegList); in ~Spill()
DARMAssembler.cpp134 STM(AL, FD, SP, 1, LSAVED); in prolog()
144 STM(AL, FD, SP, 1, touched | LLR); in epilog()
147 LDM(AL, FD, SP, 1, touched | LLR); in epilog()
148 BX(AL, LR); in epilog()
153 MOV(AL, 0, R0, R0); // NOP in epilog()
156 BX(AL, LR); in epilog()
DMIPS64Assembler.cpp396 if (cc != AL) { in dataProcessing()
577 if (cc != AL) { in dataProcessing()
706 case AL: mMips->B(label); break; in B()
DARMAssemblerInterface.h35 EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, AL, NV, enumerator
DMIPSAssembler.cpp417 if (cc != AL) { in dataProcessing()
590 if (cc != AL) { in dataProcessing()
718 case AL: mMips->B(label); break; in B()