| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitConst32AndConst64.cpp | 81 uint64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local
88 int64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local
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| D | HexagonHardwareLoops.cpp | 655 int Mask = 0, ImmValue = 0; in getLoopTripCount() local
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| D | HexagonInstrInfo.cpp | 2013 int ImmValue = MO.getImm(); in isConstExtended() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitConst32AndConst64.cpp | 112 int64_t ImmValue; in runOnMachineFunction() local
132 int64_t ImmValue; in runOnMachineFunction() local
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| D | HexagonHardwareLoops.cpp | 622 int Mask = 0, ImmValue = 0; in getLoopTripCount() local
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| D | HexagonInstrInfo.cpp | 1942 int ImmValue = MO.getImm(); in isConstExtended() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 539 APInt ImmValue; in selectVSplatCommon() local
615 APInt ImmValue; in selectVSplatUimmPow2() local
646 APInt ImmValue; in selectVSplatMaskL() local
680 APInt ImmValue; in selectVSplatMaskR() local
702 APInt ImmValue; in selectVSplatUimmInvPow2() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 605 APInt ImmValue; in selectVSplatCommon() local
681 APInt ImmValue; in selectVSplatUimmPow2() local
712 APInt ImmValue; in selectVSplatMaskL() local
746 APInt ImmValue; in selectVSplatMaskR() local
768 APInt ImmValue; in selectVSplatUimmInvPow2() local
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| D | MicroMipsSizeReduction.cpp | 522 int64_t ImmValue; in ReduceADDIUToADDIUSP() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2513 int64_t ImmValue = Inst.getOperand(2).getImm(); in tryExpandInstruction() local
2525 int64_t ImmValue = Inst.getOperand(2).getImm(); in tryExpandInstruction() local
2643 bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, in loadImmediate()
3538 int64_t ImmValue = ImmOp.getImm(); in expandBranchImm() local
3951 int64_t ImmValue; in expandDivRem() local
4317 int64_t ImmValue = Inst.getOperand(2).getImm(); in expandAliasImmediate() local
4479 int64_t ImmValue = Inst.getOperand(2).getImm(); in expandRotationImm() local
4604 int64_t ImmValue = Inst.getOperand(2).getImm() % 64; in expandDRotationImm() local
4714 int32_t ImmValue = Inst.getOperand(2).getImm(); in expandMulImm() local
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 2047 int64_t ImmValue = Inst.getOperand(2).getImm(); in tryExpandInstruction() local
2059 int64_t ImmValue = Inst.getOperand(2).getImm(); in tryExpandInstruction() local
2146 bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, in loadImmediate()
2611 int64_t ImmValue = ImmOp.getImm(); in expandBranchImm() local
3329 int64_t ImmValue = Inst.getOperand(2).getImm(); in expandAliasImmediate() local
3453 int64_t ImmValue = Inst.getOperand(2).getImm(); in expandRotationImm() local
3582 int64_t ImmValue = Inst.getOperand(2).getImm() % 64; in expandDRotationImm() local
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 208 unsigned SrcReg2, int ImmValue, in isRedundantFlagInstr()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 207 unsigned SrcReg2, int ImmValue, in isRedundantFlagInstr()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 516 int32_t ImmValue = RawImmValue; in expandSET() local
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| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 488 int32_t ImmValue = RawImmValue; in expandSET() local
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| /external/llvm/lib/Object/ |
| D | MachOObjectFile.cpp | 1544 uint8_t ImmValue = Byte & MachO::REBASE_IMMEDIATE_MASK; in moveNext() local
1715 uint8_t ImmValue = Byte & MachO::BIND_IMMEDIATE_MASK; in moveNext() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Object/ |
| D | MachOObjectFile.cpp | 3070 uint8_t ImmValue = Byte & MachO::REBASE_IMMEDIATE_MASK; in moveNext() local
3455 uint8_t ImmValue = Byte & MachO::BIND_IMMEDIATE_MASK; in moveNext() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 2156 uint64_t ImmValue = 0; in FoldOperand() local
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 2254 uint64_t ImmValue = 0; in FoldOperand() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 2362 unsigned SrcReg2, int ImmValue, in isRedundantFlagInstr()
|
| /external/v8/src/mips/ |
| D | constants-mips.h | 1521 inline int32_t ImmValue(int bits) const { in ImmValue() function
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 1578 inline int32_t ImmValue(int bits) const { in ImmValue() function
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 2607 int ImmValue, const MachineInstr *OI) { in isRedundantFlagInstr()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 4907 unsigned SrcReg2, int ImmValue, in isRedundantFlagInstr()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 3456 int ImmValue, MachineInstr &OI) { in isRedundantFlagInstr()
|