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/external/libxml2/result/
Datt10.sax5 SAX.elementDecl(tst, 3, ...)
6 SAX.attributeDecl(tst, a, 8, 3, NULL, ...)
7 SAX.attributeDecl(tst, b, 1, 3, NULL, ...)
21 SAX.startElement(tst, a=' xyz', b=' xyz')
22 SAX.endElement(tst)
35 SAX.startElement(tst, a='&d;&d;A&a; &a;B&da;', b='&d;&d;A&a; &a;B&da;')
36 SAX.endElement(tst)
39 SAX.startElement(tst, a='
50 SAX.endElement(tst)
53 SAX.startElement(tst, a=' x y ', b=' x y ')
[all …]
Datt10.sax25 SAX.elementDecl(tst, 3, ...)
6 SAX.attributeDecl(tst, a, 8, 3, NULL, ...)
7 SAX.attributeDecl(tst, b, 1, 3, NULL, ...)
21 SAX.startElementNs(tst, NULL, NULL, 0, 2, 0, a='xyz"...', 3, b=' xy...', 5)
22 SAX.endElementNs(tst, NULL, NULL)
35 SAX.startElementNs(tst, NULL, NULL, 0, 2, 0, a='&d;&...', 19, b='&d;&...', 19)
36 SAX.endElementNs(tst, NULL, NULL)
39 SAX.startElementNs(tst, NULL, NULL, 0, 2, 0, a='
46 SAX.endElementNs(tst, NULL, NULL)
49 SAX.startElementNs(tst, NULL, NULL, 0, 2, 0, a='x y...', 3, b=' x ...', 6)
[all …]
Datt10.rdr5 1 1 tst 1 0
8 1 1 tst 1 0
11 1 1 tst 1 0
14 1 1 tst 1 0
17 1 1 tst 1 0
20 1 1 tst 1 0
Datt10.rde5 1 1 tst 1 0
8 1 1 tst 1 0
11 1 1 tst 1 0
14 1 1 tst 1 0
17 1 1 tst 1 0
20 1 1 tst 1 0
/external/libxml2/result/noent/
Datt10.sax25 SAX.elementDecl(tst, 3, ...)
6 SAX.attributeDecl(tst, a, 8, 3, NULL, ...)
7 SAX.attributeDecl(tst, b, 1, 3, NULL, ...)
21 SAX.startElementNs(tst, NULL, NULL, 0, 2, 0, a='xyz"...', 3, b=' xy...', 5)
22 SAX.endElementNs(tst, NULL, NULL)
35 SAX.startElementNs(tst, NULL, NULL, 0, 2, 0, a='A B...', 3, b=' A ...', 9)
36 SAX.endElementNs(tst, NULL, NULL)
39 SAX.startElementNs(tst, NULL, NULL, 0, 2, 0, a='
46 SAX.endElementNs(tst, NULL, NULL)
49 SAX.startElementNs(tst, NULL, NULL, 0, 2, 0, a='x y...', 3, b=' x ...', 6)
[all …]
/external/tensorflow/tensorflow/python/debug/cli/
Danalyzer_cli_test.py95 def assert_column_header_command_shortcut(tst, argument
101 tst.assertFalse(reverse and "-r" in command)
102 tst.assertFalse(not(op_type_regex) and ("-t %s" % op_type_regex) in command)
103 tst.assertFalse(
105 tst.assertFalse(
109 def assert_listed_tensors(tst, argument
141 tst.assertEqual("%d dumped tensor(s):" % num_tensors, next(line_iter))
143 tst.assertEqual("%d dumped tensor(s) passing filter \"%s\":" %
148 tst.assertEqual("Op type regex filter: \"%s\"" % op_type_regex,
153 tst.assertEqual("Node name regex filter: \"%s\"" % node_name_regex,
[all …]
/external/ltp/testcases/open_posix_testsuite/conformance/interfaces/sched_setscheduler/
D1-1.c46 struct unique *tst; in main() local
48 tst = sym; in main()
49 while (tst->name) { in main()
51 printf("Policy: %s\n", tst->name); in main()
54 policy = tst->value; in main()
68 tst->name); in main()
72 tst++; in main()
84 tst->name); in main()
90 tst->name); in main()
94 tst++; in main()
D19-1.c45 struct unique *tst; in main() local
47 tst = sym; in main()
48 while (tst->name) { in main()
49 policy = tst->value; in main()
51 printf("Policy: %s\n", tst->name); in main()
83 tst++; in main()
D17-1.c51 struct unique *tst; in main() local
53 tst = sym; in main()
54 while (tst->name) { in main()
55 policy = tst->value; in main()
57 printf("Policy: %s\n", tst->name); in main()
111 tst++; in main()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AVR/
Dinst-tst.s6 tst r3
7 tst r14
8 tst r24
9 tst r12
11 ; CHECK: tst r3 ; encoding: [0x33,0x20]
12 ; CHECK: tst r14 ; encoding: [0xee,0x20]
13 ; CHECK: tst r24 ; encoding: [0x88,0x23]
14 ; CHECK: tst r12 ; encoding: [0xcc,0x20]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Danalyze-branch.ll15 %tst = icmp eq i32 %in, 42
16 br i1 %tst, label %true, label %false, !prof !0
38 %tst = icmp eq i32 %in, 42
39 br i1 %tst, label %true, label %false, !prof !1
61 %tst = icmp eq i32 %in, 0
62 br i1 %tst, label %true, label %false, !prof !0
82 %tst = icmp eq i64 %in, 0
83 br i1 %tst, label %true, label %false, !prof !1
103 %tst = icmp ne i32 %in, 0
104 br i1 %tst, label %true, label %false, !prof !0
[all …]
/external/llvm/test/CodeGen/AArch64/
Danalyze-branch.ll15 %tst = icmp eq i32 %in, 42
16 br i1 %tst, label %true, label %false, !prof !0
38 %tst = icmp eq i32 %in, 42
39 br i1 %tst, label %true, label %false, !prof !1
61 %tst = icmp eq i32 %in, 0
62 br i1 %tst, label %true, label %false, !prof !0
82 %tst = icmp eq i64 %in, 0
83 br i1 %tst, label %true, label %false, !prof !1
103 %tst = icmp ne i32 %in, 0
104 br i1 %tst, label %true, label %false, !prof !0
[all …]
/external/ltp/testcases/open_posix_testsuite/conformance/definitions/sched_h/
D10-1.c39 struct unique *tst; in main() local
41 tst = sym; in main()
43 while (tst->name) { in main()
45 if (tst->value == sym[i].value in main()
46 && strcmp(tst->name, sym[i].name)) { in main()
48 tst->name, sym[i].name); in main()
52 tst++; in main()
/external/bzip2/
Dmakefile.msc31 .\\bzip2 -d < sample1.bz2 > sample1.tst
32 .\\bzip2 -d < sample2.bz2 > sample2.tst
33 .\\bzip2 -ds < sample3.bz2 > sample3.tst
43 fc sample1.tst sample1.ref
44 fc sample2.tst sample2.ref
45 fc sample3.tst sample3.ref
57 del sample1.tst
58 del sample2.tst
59 del sample3.tst
/external/llvm/test/CodeGen/ARM/
Dfast-isel-select.ll10 ; ARM: tst r0, #1
15 ; THUMB: tst.w r0, #1
26 ; ARM: tst r0, #1
30 ; THUMB: tst.w r0, #1
41 ; ARM: tst r0, #1
45 ; THUMB: tst.w r0, #1
58 ; ARM: tst r0, #1
63 ; THUMB: tst.w r0, #1
74 ; ARM: tst r0, #1
78 ; THUMB: tst.w r0, #1
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dfast-isel-select.ll9 ; ARM: tst r0, #1
13 ; THUMB: tst.w r0, #1
24 ; ARM: tst r0, #1
28 ; THUMB: tst.w r0, #1
39 ; ARM: tst r0, #1
43 ; THUMB: tst.w r0, #1
55 ; ARM: tst r0, #1
59 ; THUMB: tst.w r0, #1
70 ; ARM: tst r0, #1
74 ; THUMB: tst.w r0, #1
[all …]
/external/ltp/testcases/open_posix_testsuite/conformance/definitions/errno_h/
D3-2.c115 struct unique *tst; in main() local
117 tst = sym; in main()
119 while (tst->name) { in main()
121 …if (tst->value == sym[i].value && tst->duplicate != sym[i].value && strcmp(tst->name, sym[i].name)… in main()
123 tst->name, sym[i].name); in main()
127 tst++; in main()
/external/u-boot/arch/arm/lib/
Dmemset.S52 tst r2, #32
55 tst r2, #16
84 tst r8, #(1 << 30)
94 tst r2, #32
96 tst r2, #16
102 4: tst r2, #8
104 tst r2, #4
110 5: tst r2, #2
113 tst r2, #1
/external/ltp/testcases/open_posix_testsuite/conformance/interfaces/sched_getscheduler/
D3-1.c46 struct unique *tst; in main() local
48 tst = sym; in main()
60 while (tst->name) { in main()
61 if (result == tst->value) { in main()
65 tst++; in main()
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dbool-folding.ll88 ; ARM32: tst [[REG]], #1
114 ; ARM32: tst [[R]], #1
224 ; ARM32: tst {{.*}}, #1
227 ; ARM32: tst {{.*}}, #1
229 ; ARM32: tst {{.*}}, #1
263 ; ARM32: tst
266 ; ARM32: tst
268 ; ARM32: tst
356 ; ARM32: tst
359 ; ARM32: tst
[all …]
/external/llvm/test/Transforms/CodeGenPrepare/X86/
Dx86-shuffle-sink.ll7 define <16 x i8> @test_8bit(<16 x i8> %lhs, <16 x i8> %tmp, i1 %tst) {
16 br i1 %tst, label %if_true, label %if_false
26 define <8 x i16> @test_16bit(<8 x i16> %lhs, <8 x i16> %tmp, i1 %tst) {
35 br i1 %tst, label %if_true, label %if_false
45 define <4 x i32> @test_notsplat(<4 x i32> %lhs, <4 x i32> %tmp, i1 %tst) {
54 br i1 %tst, label %if_true, label %if_false
64 define <4 x i32> @test_32bit(<4 x i32> %lhs, <4 x i32> %tmp, i1 %tst) {
75 br i1 %tst, label %if_true, label %if_false
85 define <2 x i64> @test_64bit(<2 x i64> %lhs, <2 x i64> %tmp, i1 %tst) {
97 br i1 %tst, label %if_true, label %if_false
/external/toybox/tests/
Dbc.test11 tst="$1"
12 results=$(cat "$BDIR/${tst}_results.txt")
13 testcmd "$tst" "-l $BDIR/$tst.txt" "$results\n" "$BDIR/$tst.txt" ""
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-tst.ll4 ; tst as 'mov.w r0, #0'.
13 ; CHECK: tst.w {{.*}}, #187
22 ; CHECK: tst.w {{.*}}, #11141290
31 ; CHECK: tst.w {{.*}}, #-872363008
40 ; CHECK: tst.w {{.*}}, #-572662307
49 ; CHECK: tst.w {{.*}}, #1114112
Dthumb2-tst2.ll4 ; tst as 'mov.w r0, #0'.
8 ; CHECK: tst {{.*}}, r1
16 ; CHECK: tst {{.*}}, r1
24 ; CHECK: tst.w {{.*}}, r1, lsl #5
33 ; CHECK: tst.w {{.*}}, r1, lsr #6
42 ; CHECK: tst.w {{.*}}, r1, asr #7
51 ; CHECK: tst.w {{.*}}, {{.*}}, ror #8
/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/
Dthumb2-tst2.ll4 ; tst as 'mov.w r0, #0'. So far, that requires physreg joining.
8 ; CHECK: tst r0, r1
16 ; CHECK: tst r0, r1
24 ; CHECK: tst.w r0, r1, lsl #5
33 ; CHECK: tst.w r0, r1, lsr #6
42 ; CHECK: tst.w r0, r1, asr #7
51 ; CHECK: tst.w r0, r0, ror #8

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