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1; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
2
3; These tests would be improved by 'movs r0, #0' being rematerialized below the
4; tst as 'mov.w r0, #0'.
5
6define i1 @f2(i32 %a, i32 %b) {
7; CHECK-LABEL: f2:
8; CHECK: tst {{.*}}, r1
9    %tmp = and i32 %a, %b
10    %tmp1 = icmp eq i32 %tmp, 0
11    ret i1 %tmp1
12}
13
14define i1 @f4(i32 %a, i32 %b) {
15; CHECK-LABEL: f4:
16; CHECK: tst {{.*}}, r1
17    %tmp = and i32 %a, %b
18    %tmp1 = icmp eq i32 0, %tmp
19    ret i1 %tmp1
20}
21
22define i1 @f6(i32 %a, i32 %b) {
23; CHECK-LABEL: f6:
24; CHECK: tst.w {{.*}}, r1, lsl #5
25    %tmp = shl i32 %b, 5
26    %tmp1 = and i32 %a, %tmp
27    %tmp2 = icmp eq i32 %tmp1, 0
28    ret i1 %tmp2
29}
30
31define i1 @f7(i32 %a, i32 %b) {
32; CHECK-LABEL: f7:
33; CHECK: tst.w {{.*}}, r1, lsr #6
34    %tmp = lshr i32 %b, 6
35    %tmp1 = and i32 %a, %tmp
36    %tmp2 = icmp eq i32 %tmp1, 0
37    ret i1 %tmp2
38}
39
40define i1 @f8(i32 %a, i32 %b) {
41; CHECK-LABEL: f8:
42; CHECK: tst.w {{.*}}, r1, asr #7
43    %tmp = ashr i32 %b, 7
44    %tmp1 = and i32 %a, %tmp
45    %tmp2 = icmp eq i32 %tmp1, 0
46    ret i1 %tmp2
47}
48
49define i1 @f9(i32 %a, i32 %b) {
50; CHECK-LABEL: f9:
51; CHECK: tst.w {{.*}}, {{.*}}, ror #8
52    %l8 = shl i32 %a, 24
53    %r8 = lshr i32 %a, 8
54    %tmp = or i32 %l8, %r8
55    %tmp1 = and i32 %a, %tmp
56    %tmp2 = icmp eq i32 %tmp1, 0
57    ret i1 %tmp2
58}
59