/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
D | regbankselect-fcmp.mir | 16 ; CHECK: [[FCMP:%[0-9]+]]:sgpr(s1) = G_FCMP floatpred(uge), [[COPY]](s32), [[COPY2]] 32 ; CHECK: [[FCMP:%[0-9]+]]:sgpr(s1) = G_FCMP floatpred(uge), [[COPY]](s32), [[COPY1]] 49 ; CHECK: [[FCMP:%[0-9]+]]:sgpr(s1) = G_FCMP floatpred(uge), [[COPY1]](s32), [[COPY2]]
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/external/llvm/test/Transforms/InstCombine/ |
D | pow-1.ll | 76 ; CHECK-NEXT: [[FCMP:%[a-z0-9]+]] = fcmp oeq float %x, 0xFFF0000000000000 77 ; CHECK-NEXT: [[SELECT:%[a-z0-9]+]] = select i1 [[FCMP]], float 0x7FF0000000000000, float [[FABSF]] 87 ; CHECK-NEXT: [[FCMP:%[a-z0-9]+]] = fcmp oeq double %x, 0xFFF0000000000000 88 ; CHECK-NEXT: [[SELECT:%[a-z0-9]+]] = select i1 [[FCMP]], double 0x7FF0000000000000, double [[FABS]] 167 ; CHECK-NEXT: [[FCMP:%[a-z0-9]+]] = fcmp oeq double %x, 0xFFF0000000000000 168 ; CHECK-NEXT: [[SELECT:%[a-z0-9]+]] = select i1 [[FCMP]], double 0x7FF0000000000000, double [[FABS]]
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D | 2008-11-08-FCmp.ll | 4 ; When inst combining an FCMP with the LHS coming from a uitofp instruction, we
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/GlobalISel/ |
D | legalize-fcmp.mir | 32 ; CHECK: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(oge), [[COPY]](s64), [[COPY1]] 33 ; CHECK: $w0 = COPY [[FCMP]](s32)
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D | regbankselect-default.mir | 689 ; CHECK: [[FCMP:%[0-9]+]]:gpr(s32) = G_FCMP floatpred(olt), [[COPY]](s32), [[COPY]] 690 ; CHECK: [[TRUNC:%[0-9]+]]:gpr(s1) = G_TRUNC [[FCMP]](s32)
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/ |
D | pow-1.ll | 122 ; CHECK-NEXT: [[FCMP:%[a-z0-9]+]] = fcmp oeq float %x, 0xFFF0000000000000 123 ; CHECK-NEXT: [[SELECT:%[a-z0-9]+]] = select i1 [[FCMP]], float 0x7FF0000000000000, float [[FABSF]] 133 ; CHECK-NEXT: [[FCMP:%[a-z0-9]+]] = fcmp oeq double %x, 0xFFF0000000000000 134 ; CHECK-NEXT: [[SELECT:%[a-z0-9]+]] = select i1 [[FCMP]], double 0x7FF0000000000000, double [[FABS]] 277 ; CHECK-NEXT: [[FCMP:%[a-z0-9]+]] = fcmp oeq double %x, 0xFFF0000000000000 278 ; CHECK-NEXT: [[SELECT:%[a-z0-9]+]] = select i1 [[FCMP]], double 0x7FF0000000000000, double [[FABS]]
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D | 2008-11-08-FCmp.ll | 4 ; When inst combining an FCMP with the LHS coming from a uitofp instruction, we
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/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
D | 2008-11-08-FCmp.ll | 4 ; When inst combining an FCMP with the LHS coming from a uitofp instruction, we
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.h | 61 FCMP, enumerator
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D | SystemZOperators.td | 182 def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp, [SDNPOutGlue]>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.h | 61 FCMP, enumerator
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D | SystemZOperators.td | 263 def z_fcmp : SDNode<"SystemZISD::FCMP", SDT_ZCmp>;
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 68 FCMP, enumerator
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D | AArch64SchedCyclone.td | 461 // FCMP,FCMPE,FCCMP,FCCMPE
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/external/mesa3d/src/broadcom/compiler/ |
D | v3d_compiler.h | 851 VIR_A_ALU2(FCMP) in VIR_A_ALU2()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 68 FCMP, enumerator
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D | AArch64SchedCyclone.td | 463 // FCMP,FCMPE,FCCMP,FCCMPE
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D | AArch64SchedFalkorDetails.td | 1116 def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^FCMP(E)?(S|D)r(r|i)$")>;
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/external/pcre/dist2/src/sljit/ |
D | sljitNativeARM_64.c | 90 #define FCMP 0x1e602000 macro 1423 return push_inst(compiler, (FCMP ^ inv_bits) | VN(src1) | VM(src2)); in sljit_emit_fop1_cmp()
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/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
D | SparcInstrInfo.td | 681 // Note 2: the result of a FCMP is not available until the 2nd cycle
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/external/v8/src/arm64/ |
D | constants-arm64.h | 1099 FCMP = FCMP_s, enumerator
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 1779 ### FCMP ### subsection 1786 ### FCMP ### subsection
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/external/vixl/src/aarch64/ |
D | constants-aarch64.h | 1273 FCMP = FCMP_s, enumerator
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
D | SparcInstrInfo.td | 1293 // Note 2: the result of a FCMP is not available until the 2nd cycle
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstrInfo.td | 1288 // Note 2: the result of a FCMP is not available until the 2nd cycle
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