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Searched refs:GIR_AddRegister (Results 1 – 6 of 6) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenGlobalISel.inc790 GIR_AddRegister, /*InsnID*/0, ::zero_reg,
814 GIR_AddRegister, /*InsnID*/0, ::zero_reg,
838 GIR_AddRegister, /*InsnID*/0, ::zero_reg,
862 GIR_AddRegister, /*InsnID*/0, ::zero_reg,
886 GIR_AddRegister, /*InsnID*/0, ::zero_reg,
910 GIR_AddRegister, /*InsnID*/0, ::zero_reg,
934 GIR_AddRegister, /*InsnID*/0, ::zero_reg,
958 GIR_AddRegister, /*InsnID*/0, ::zero_reg,
994 GIR_AddRegister, /*InsnID*/0, ::zero_reg,
1030 GIR_AddRegister, /*InsnID*/0, ::zero_reg,
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/
DInstructionSelector.h260 GIR_AddRegister, enumerator
DInstructionSelectorImpl.h752 case GIR_AddRegister: { in executeMatchTable()
/external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/
DGlobalISelEmitter.td656 // NOOPT-NEXT: GIR_AddRegister, /*InsnID*/0, MyTarget::R0,
686 // NOOPT-NEXT: GIR_AddRegister, /*InsnID*/0, MyTarget::R0,
716 // NOOPT-NEXT: GIR_AddRegister, /*InsnID*/0, MyTarget::R0,
717 // NOOPT-NEXT: GIR_AddRegister, /*InsnID*/0, MyTarget::R0,
749 // NOOPT-NEXT: GIR_AddRegister, /*InsnID*/0, MyTarget::R0,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenGlobalISel.inc3616 GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
3681 GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
3716 GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
3745 GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
3774 GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
3923 GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
4625 GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
4645 GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
4659 GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
4687 GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
[all …]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenGlobalISel.inc2471 GIR_AddRegister, /*InsnID*/0, Mips::ZERO,
2514 GIR_AddRegister, /*InsnID*/0, Mips::ZERO,
2543 GIR_AddRegister, /*InsnID*/0, Mips::ZERO,