/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | TargetLowering.h | 381 virtual bool isLoadBitCastBeneficial(EVT LoadVT, in isLoadBitCastBeneficial() argument 385 if (!LoadVT.isSimple() || !BitcastVT.isSimple()) in isLoadBitCastBeneficial() 388 MVT LoadMVT = LoadVT.getSimpleVT(); in isLoadBitCastBeneficial() 2118 EVT LoadVT = getValueType(DL, Load->getType()); in isExtLoad() local 2122 if (!Load->hasOneUse() && (isTypeLegal(LoadVT) || !isTypeLegal(VT)) && in isExtLoad() 2135 return isLoadExtLegal(LType, VT, LoadVT); in isExtLoad()
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D | BasicTTIImpl.h | 602 EVT LoadVT = EVT::getEVT(Src); 605 if (TLI->isLoadExtLegal(LType, ExtVT, LoadVT))
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorOps.cpp | 545 EVT LoadVT = WideVT; in ExpandLoad() local 548 LoadVT = EVT::getIntegerVT(*DAG.getContext(), LoadBytes << 3); in ExpandLoad() 552 LoadVT, LD->isVolatile(), in ExpandLoad()
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D | SelectionDAGBuilder.cpp | 5851 static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT, in getMemCmpLoad() argument 5882 SDValue LoadVal = Builder.DAG.getLoad(LoadVT, Builder.getCurSDLoc(), Root, in getMemCmpLoad() 5946 MVT LoadVT; in visitMemCmpCall() local 5950 LoadVT = MVT::Other; in visitMemCmpCall() 5955 LoadVT = MVT::i16; in visitMemCmpCall() 5959 LoadVT = MVT::i32; in visitMemCmpCall() 5963 LoadVT = MVT::i64; in visitMemCmpCall() 5989 if (!TLI.isTypeLegal(LoadVT) || in visitMemCmpCall() 5990 !TLI.allowsMisalignedMemoryAccesses(LoadVT, SrcAS) || in visitMemCmpCall() 5991 !TLI.allowsMisalignedMemoryAccesses(LoadVT, DstAS)) in visitMemCmpCall() [all …]
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D | LegalizeDAG.cpp | 844 EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT()); in LegalizeLoadOps() local 846 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT)) { in LegalizeLoadOps() 850 (LoadVT == SrcVT) ? ISD::NON_EXTLOAD : ExtType; in LegalizeLoadOps() 852 SDValue Load = DAG.getExtLoad(MidExtType, dl, LoadVT, Chain, Ptr, in LegalizeLoadOps() 868 EVT LoadVT = TLI.getRegisterType(IDestVT.getSimpleVT()); in LegalizeLoadOps() local 870 SDValue Result = DAG.getExtLoad(ISD::ZEXTLOAD, dl, LoadVT, in LegalizeLoadOps()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 3651 static SDValue adjustLoadValueTypeImpl(SDValue Result, EVT LoadVT, in adjustLoadValueTypeImpl() argument 3654 if (!LoadVT.isVector()) in adjustLoadValueTypeImpl() 3659 EVT IntLoadVT = LoadVT.changeTypeToInteger(); in adjustLoadValueTypeImpl() 3671 return DAG.getNode(ISD::BITCAST, DL, LoadVT, Result); in adjustLoadValueTypeImpl() 3675 return DAG.getNode(ISD::BITCAST, DL, LoadVT, Result); in adjustLoadValueTypeImpl() 3695 EVT LoadVT = M->getValueType(0); in adjustLoadValueType() local 3697 EVT EquivLoadVT = LoadVT; in adjustLoadValueType() 3698 if (Unpacked && LoadVT.isVector()) { in adjustLoadValueType() 3699 EquivLoadVT = LoadVT.isVector() ? in adjustLoadValueType() 3701 LoadVT.getVectorNumElements()) : LoadVT; in adjustLoadValueType() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorOps.cpp | 605 EVT LoadVT = WideVT; in ExpandLoad() local 608 LoadVT = EVT::getIntegerVT(*DAG.getContext(), LoadBytes << 3); in ExpandLoad() 612 LD->getPointerInfo().getWithOffset(Offset), LoadVT, in ExpandLoad()
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D | SelectionDAGBuilder.cpp | 6512 static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT, in getMemCmpLoad() argument 6519 Type::getIntNTy(PtrVal->getContext(), LoadVT.getScalarSizeInBits()); in getMemCmpLoad() 6520 if (LoadVT.isVector()) in getMemCmpLoad() 6521 LoadTy = VectorType::get(LoadTy, LoadVT.getVectorNumElements()); in getMemCmpLoad() 6546 SDValue LoadVal = Builder.DAG.getLoad(LoadVT, Builder.getCurSDLoc(), Root, in getMemCmpLoad() 6625 MVT LoadVT; in visitMemCmpCall() local 6631 LoadVT = MVT::i16; in visitMemCmpCall() 6634 LoadVT = MVT::i32; in visitMemCmpCall() 6639 LoadVT = hasFastLoadsAndCompare(NumBitsToCompare); in visitMemCmpCall() 6643 if (LoadVT == MVT::INVALID_SIMPLE_VALUE_TYPE) in visitMemCmpCall() [all …]
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D | LegalizeDAG.cpp | 871 EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT()); in LegalizeLoadOps() local 873 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT)) { in LegalizeLoadOps() 877 (LoadVT == SrcVT) ? ISD::NON_EXTLOAD : ExtType; in LegalizeLoadOps() 879 SDValue Load = DAG.getExtLoad(MidExtType, dl, LoadVT, Chain, Ptr, in LegalizeLoadOps() 895 EVT LoadVT = TLI.getRegisterType(IDestVT.getSimpleVT()); in LegalizeLoadOps() local 897 SDValue Result = DAG.getExtLoad(ISD::ZEXTLOAD, dl, LoadVT, in LegalizeLoadOps()
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D | DAGCombiner.cpp | 13843 EVT LoadVT; in getStoreMergeCandidates() local 13847 LoadVT = Ld->getMemoryVT(); in getStoreMergeCandidates() 13849 if (MemVT != LoadVT) in getStoreMergeCandidates() 13872 if (LoadVT != OtherLd->getMemoryVT()) in getStoreMergeCandidates()
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/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 275 virtual bool isLoadBitCastBeneficial(EVT LoadVT, in isLoadBitCastBeneficial() argument 279 if (!LoadVT.isSimple() || !BitcastVT.isSimple()) in isLoadBitCastBeneficial() 282 MVT LoadMVT = LoadVT.getSimpleVT(); in isLoadBitCastBeneficial()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGBuilder.cpp | 5343 static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT, in getMemCmpLoad() argument 5375 SDValue LoadVal = Builder.DAG.getLoad(LoadVT, Builder.getCurDebugLoc(), Root, in getMemCmpLoad() 5406 MVT LoadVT; in visitMemCmpCall() local 5410 LoadVT = MVT::Other; in visitMemCmpCall() 5415 LoadVT = MVT::i16; in visitMemCmpCall() 5419 LoadVT = MVT::i32; in visitMemCmpCall() 5423 LoadVT = MVT::i64; in visitMemCmpCall() 5445 if (!TLI.isTypeLegal(LoadVT) ||!TLI.allowsUnalignedMemoryAccesses(LoadVT)) in visitMemCmpCall() 5450 SDValue LHSVal = getMemCmpLoad(LHS, LoadVT, LoadTy, *this); in visitMemCmpCall() 5451 SDValue RHSVal = getMemCmpLoad(RHS, LoadVT, LoadTy, *this); in visitMemCmpCall()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 2417 EVT LoadVT = EltVT; in LowerFormalArguments() local 2419 LoadVT = MVT::i8; in LowerFormalArguments() 2424 LoadVT = MVT::i32; in LowerFormalArguments() 2426 EVT VecVT = EVT::getVectorVT(F->getContext(), LoadVT, NumElts); in LowerFormalArguments() 2440 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, LoadVT, P, in LowerFormalArguments() 2451 Ins[InsIdx].VT.getSizeInBits() > LoadVT.getSizeInBits()) { in LowerFormalArguments()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 1047 bool isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT) const override;
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D | X86ISelLowering.cpp | 4722 bool X86TargetLowering::isLoadBitCastBeneficial(EVT LoadVT, in isLoadBitCastBeneficial() argument 4727 return TargetLowering::isLoadBitCastBeneficial(LoadVT, BitcastVT); in isLoadBitCastBeneficial()
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/external/llvm/lib/CodeGen/ |
D | CodeGenPrepare.cpp | 4245 EVT LoadVT = TLI->getValueType(*DL, LI->getType()); in moveExtToFormExtLoad() local 4250 (TLI->isTypeLegal(LoadVT) || !TLI->isTypeLegal(VT)) && in moveExtToFormExtLoad() 4265 if (TLI && !TLI->isLoadExtLegal(LType, VT, LoadVT)) { in moveExtToFormExtLoad()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 10649 MVT LoadVT = VT.getSimpleVT(); in PerformDAGCombine() local 10651 (LoadVT == MVT::v2f64 || LoadVT == MVT::v2i64 || in PerformDAGCombine() 10652 LoadVT == MVT::v4f32 || LoadVT == MVT::v4i32)) in PerformDAGCombine()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 12569 MVT LoadVT = VT.getSimpleVT(); in PerformDAGCombine() local 12571 (LoadVT == MVT::v2f64 || LoadVT == MVT::v2i64 || in PerformDAGCombine() 12572 LoadVT == MVT::v4f32 || LoadVT == MVT::v4i32)) in PerformDAGCombine()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 11708 EVT LoadVT = isLaneOp ? VecTy.getVectorElementType() : AlignedVecTy; in CombineBaseUpdate() local 11709 SDValue UpdN = DAG.getMemIntrinsicNode(NewOpc, dl, SDTys, Ops, LoadVT, in CombineBaseUpdate()
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