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Searched refs:MM6 (Results 1 – 25 of 40) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dmicromips-mtc-mfc.ll5 ; RUN: -show-mc-encoding < %s | FileCheck --check-prefix=MM6 %s
24 ; MM6-LABEL: foo:
25 ; MM6: # %bb.0: # %entry
26 ; MM6-NEXT: mov.d $f0, $f12 # encoding: [0x46,0x20,0x60,0x06]
27 ; MM6-NEXT: mtc1 $zero, $f1 # encoding: [0x54,0x01,0x28,0x3b]
28 ; MM6-NEXT: mthc1 $zero, $f1 # encoding: [0x54,0x01,0x38,0x3b]
29 ; MM6-NEXT: cmp.ule.d $f1, $f12, $f1 # encoding: [0x54,0x2c,0x09,0xd5]
30 ; MM6-NEXT: mfc1 $2, $f1 # encoding: [0x54,0x41,0x20,0x3b]
31 ; MM6-NEXT: andi16 $2, $2, 1 # encoding: [0x2d,0x21]
32 ; MM6-NEXT: jrc $ra # encoding: [0x45,0xbf]
[all …]
/external/mesa3d/src/mesa/x86/
D3dnow_xform4.S76 MOVQ ( MM4, MM6 ) /* x3 | x2 */
94 PUNPCKHDQ ( MM6, MM6 ) /* x3 | x3 */
97 MOVQ ( MM6, MM7 ) /* x3 | x3 */
102 PFMUL ( REGOFF(48, ECX), MM6 ) /* x3*m13 | x3*m12 */
106 PFADD ( MM4, MM6 )
109 PFADD ( MM2, MM6 )
112 MOVQ ( MM6, REGOFF(-16, EDX) )
179 MOVQ ( MM5, MM6 ) /* x3 | x2 */
188 PFMUL ( MM1, MM6 ) /* x3*m32 | x2*m22 */
191 PFACC ( MM3, MM6 ) /* -x2 | x2*m22+x3*m32 */
[all …]
D3dnow_xform2.S80 MOVQ ( REGIND(EAX), MM6 ) /* x1 | x0 */
81 MOVQ ( MM6, MM7 ) /* x1 | x0 */
83 PFMUL ( MM0, MM6 ) /* x1*m10 | x0*m00 */
86 PFACC ( MM7, MM6 ) /* x0*m01+x1*m11 | x0*x00+x1*m10 */
87 PFADD ( MM4, MM6 ) /* x0*...*m11+m31 | x0*...*m10+m30 */
89 MOVQ ( MM6, REGIND(EDX) ) /* write r1, r0 */
90 MOVQ ( REGIND(EAX), MM6 ) /* x1 | x0 */
92 MOVQ ( MM6, MM7 ) /* x1 | x0 */
93 PFMUL ( MM2, MM6 ) /* x1*m12 | x0*m02 */
98 PFACC ( MM7, MM6 ) /* x0*m03+x1*m13 | x0*x02+x1*m12 */
[all …]
Dmmx_blend.S276 GMB_ALPHA( MM1, MM3, MM4, MM6 ) ;\
277 GMB_LERP_GSC( MM1, MM2, MM3, MM4, MM5, MM6 ) ;\
278 GMB_PACK( MM3, MM6 ) ;\
D3dnow_xform3.S170 MOVQ ( MM5, MM6 ) /* | x2 */
175 PFMUL ( MM2, MM6 ) /* | x2*m22 */
181 PFADD ( MM3, MM6 ) /* | x2*m22+m32 */
185 MOVD ( MM6, REGOFF(-8, EDX) ) /* write r2 */
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrControl.td142 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
181 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
217 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
249 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
282 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
DX86GenRegisterInfo.inc90 MM6 = 71,
319 const unsigned MM6_Overlaps[] = { X86::MM6, 0 };
636 { "MM6", MM6_Overlaps, Empty_SubRegsSet, Empty_SuperRegsSet },
920 X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7,
1187 RI->mapDwarfRegToLLVMReg(47, X86::MM6, false );
1247 RI->mapDwarfRegToLLVMReg(35, X86::MM6, false );
1282 RI->mapDwarfRegToLLVMReg(35, X86::MM6, false );
1313 RI->mapDwarfRegToLLVMReg(47, X86::MM6, true );
1373 RI->mapDwarfRegToLLVMReg(35, X86::MM6, true );
1408 RI->mapDwarfRegToLLVMReg(35, X86::MM6, true );
[all …]
DX86RegisterInfo.td153 def MM6 : Register<"mm6">, DwarfRegNum<[47, 35, 35]>;
DX86InstrCompiler.td303 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
317 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
/external/llvm/test/CodeGen/X86/
Dipra-reg-usage.ll6 …P1 FP2 FP3 FP4 FP5 FP6 FP7 K0 K1 K2 K3 K4 K5 K6 K7 MM0 MM1 MM2 MM3 MM4 MM5 MM6 MM7 R11 ST0 ST1 ST2…
/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h203 ENTRY(MM6) \
/external/capstone/arch/X86/
DX86DisassemblerDecoder.h226 ENTRY(MM6) \
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h213 ENTRY(MM6) \
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h213 ENTRY(MM6) \
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenRegisterInfo.inc143 MM6 = 123,
1181 { X86::MM6 },
1812 X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7,
2328 { 47U, X86::MM6 },
2389 { 35U, X86::MM6 },
2434 { 35U, X86::MM6 },
2495 { 47U, X86::MM6 },
2556 { 35U, X86::MM6 },
2601 { 35U, X86::MM6 },
2647 { X86::MM6, 47U },
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp198 case X86::YMM6: case X86::YMM14: case X86::MM6: in getX86RegNum()
/external/ImageMagick/PerlMagick/t/reference/write/composite/
DCopyBlue.miff41 …M3�MM4�MM1�MM-�MM-�MM-�MM.�MM0�MM-�MM'�MM�MM4�MMN�MM3�MM)�MM.�MM2�MM6�MM0�MM*�MM2�MM6�MM,�MM"�MM1…
/external/llvm/docs/TableGen/
Dindex.rst65 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
DLangIntro.rst543 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
/external/swiftshader/third_party/llvm-7.0/llvm/docs/TableGen/
Dindex.rst65 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
DLangIntro.rst623 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
/external/llvm/lib/Target/X86/
DX86RegisterInfo.td158 def MM6 : X86Reg<"mm6", 6>, DwarfRegNum<[47, 35, 35]>;
DX86InstrCompiler.td456 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
476 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86RegisterInfo.td197 def MM6 : X86Reg<"mm6", 6>, DwarfRegNum<[47, 35, 35]>;
DX86InstrCompiler.td473 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
493 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,

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