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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dvcvt-oversize.ll7 ; CHECK-DAG: fadd v[[MSB:[0-9]+]].4s, v0.4s, v0.4s
9 ; CHECK-DAG: fcvtzu v[[MSB2:[0-9]+]].4s, v[[MSB]].4s
11 ; CHECK-DAG: xtn2 v[[TMP]].8h, v[[MSB]].4s
/external/llvm/test/CodeGen/AArch64/
Dvcvt-oversize.ll7 ; CHECK-DAG: fadd v[[MSB:[0-9]+]].4s, v0.4s, v0.4s
9 ; CHECK-DAG: fcvtzu v[[MSB2:[0-9]+]].4s, v[[MSB]].4s
11 ; CHECK-DAG: xtn2 v[[TMP]].8h, v[[MSB]].4s
/external/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp164 ConstantInt *MSB; in generateUnsignedDivisionCode() local
170 MSB = Builder.getInt64(63); in generateUnsignedDivisionCode()
176 MSB = Builder.getInt32(31); in generateUnsignedDivisionCode()
258 Value *Ret0_4 = Builder.CreateICmpUGT(SR, MSB); in generateUnsignedDivisionCode()
260 Value *RetDividend = Builder.CreateICmpEQ(SR, MSB); in generateUnsignedDivisionCode()
273 Value *Tmp2 = Builder.CreateSub(MSB, SR); in generateUnsignedDivisionCode()
311 Value *Tmp6 = Builder.CreateLShr(Q_2, MSB); in generateUnsignedDivisionCode()
316 Value *Tmp10 = Builder.CreateAShr(Tmp9, MSB); in generateUnsignedDivisionCode()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp164 ConstantInt *MSB; in generateUnsignedDivisionCode() local
170 MSB = Builder.getInt64(63); in generateUnsignedDivisionCode()
176 MSB = Builder.getInt32(31); in generateUnsignedDivisionCode()
258 Value *Ret0_4 = Builder.CreateICmpUGT(SR, MSB); in generateUnsignedDivisionCode()
260 Value *RetDividend = Builder.CreateICmpEQ(SR, MSB); in generateUnsignedDivisionCode()
273 Value *Tmp2 = Builder.CreateSub(MSB, SR); in generateUnsignedDivisionCode()
311 Value *Tmp6 = Builder.CreateLShr(Q_2, MSB); in generateUnsignedDivisionCode()
316 Value *Tmp10 = Builder.CreateAShr(Tmp9, MSB); in generateUnsignedDivisionCode()
/external/u-boot/doc/
DREADME.imx2510 natural MAC byte order (i.e. MSB first).
DREADME.imx528 natural MAC byte order (i.e. MSB first).
/external/ltp/testcases/commands/file/
Dfile01.sh38 *Data:*"big endian"*) TEST_ARCH=MSB;;
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dscatter-schedule.ll7 ; The right order is "from LSB to MSB", otherwise the semantic is broken.
Dload-slice.ll13 ; LSB 0 1 2 3 | 4 5 6 7 MSB
87 ; LSB 0 1 2 3 | 4 5 | 6 7 MSB
/external/u-boot/board/toradex/colibri_imx6/
D800mhz_2x64mx16.cfg15 /* CS0 End: 7MSB of ((0x10000000 + 512M) -1) >> 25 */
D800mhz_4x64mx16.cfg15 /* CS0 End: 7MSB of ((0x10000000 + 512M) -1) >> 25 */
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ADT/
DStringExtras.h160 inline uint8_t hexFromNibbles(char MSB, char LSB) { in hexFromNibbles() argument
161 unsigned U1 = hexDigitValue(MSB); in hexFromNibbles()
/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp1420 unsigned &LSB, unsigned &MSB, in isBitfieldExtractOpFromAnd() argument
1495 MSB = SrlImm + (VT == MVT::i32 ? countTrailingOnes<uint32_t>(AndImm) in isBitfieldExtractOpFromAnd()
1503 MSB = MSB > 31 ? 31 : MSB; in isBitfieldExtractOpFromAnd()
1544 unsigned &MSB) { in isSeveralBitsExtractOpFromShr() argument
1581 MSB = BitWide + SrlImm - 1; in isSeveralBitsExtractOpFromShr()
1791 uint64_t Imm, uint64_t MSB, in getUsefulBitsFromBitfieldMoveOpd() argument
1797 if (MSB >= Imm) { in getUsefulBitsFromBitfieldMoveOpd()
1798 OpUsefulBits = OpUsefulBits.shl(MSB - Imm + 1); in getUsefulBitsFromBitfieldMoveOpd()
1805 OpUsefulBits = OpUsefulBits.shl(MSB + 1); in getUsefulBitsFromBitfieldMoveOpd()
1821 uint64_t MSB = in getUsefulBitsFromUBFM() local
[all …]
/external/llvm/test/CodeGen/X86/
Dload-slice.ll13 ; LSB 0 1 2 3 | 4 5 6 7 MSB
87 ; LSB 0 1 2 3 | 4 5 | 6 7 MSB
/external/swiftshader/third_party/LLVM/test/ExecutionEngine/
D2008-06-05-APInt-OverAShr.ll5 @.str = internal constant [10 x i8] c"MSB = %d\0A\00" ; <[10 x i8]*> [#uses=1]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp1488 unsigned &LSB, unsigned &MSB, in isBitfieldExtractOpFromAnd() argument
1564 MSB = SrlImm + (VT == MVT::i32 ? countTrailingOnes<uint32_t>(AndImm) in isBitfieldExtractOpFromAnd()
1572 MSB = MSB > 31 ? 31 : MSB; in isBitfieldExtractOpFromAnd()
1613 unsigned &MSB) { in isSeveralBitsExtractOpFromShr() argument
1650 MSB = BitWide + SrlImm - 1; in isSeveralBitsExtractOpFromShr()
1861 uint64_t Imm, uint64_t MSB, in getUsefulBitsFromBitfieldMoveOpd() argument
1867 if (MSB >= Imm) { in getUsefulBitsFromBitfieldMoveOpd()
1868 OpUsefulBits <<= MSB - Imm + 1; in getUsefulBitsFromBitfieldMoveOpd()
1875 OpUsefulBits <<= MSB + 1; in getUsefulBitsFromBitfieldMoveOpd()
1891 uint64_t MSB = in getUsefulBitsFromUBFM() local
[all …]
/external/llvm/test/ExecutionEngine/MCJIT/
D2008-06-05-APInt-OverAShr.ll6 @.str = internal constant [10 x i8] c"MSB = %d\0A\00" ; <[10 x i8]*> [#uses=1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/ExecutionEngine/OrcMCJIT/
D2008-06-05-APInt-OverAShr.ll6 @.str = internal constant [10 x i8] c"MSB = %d\0A\00" ; <[10 x i8]*> [#uses=1]
/external/llvm/test/ExecutionEngine/OrcMCJIT/
D2008-06-05-APInt-OverAShr.ll6 @.str = internal constant [10 x i8] c"MSB = %d\0A\00" ; <[10 x i8]*> [#uses=1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/ExecutionEngine/MCJIT/
D2008-06-05-APInt-OverAShr.ll6 @.str = internal constant [10 x i8] c"MSB = %d\0A\00" ; <[10 x i8]*> [#uses=1]
/external/u-boot/doc/device-tree-bindings/clock/
Dst,stm32-rcc.txt39 Where bit_offset is the bit offset within the register (LSB is 0, MSB is 31).
/external/mesa3d/src/gallium/drivers/nouveau/nvc0/mme/
Dcom9097.mme506 * parm[1] = MSB of end value
508 * parm[3] = MSB of start value
/external/grpc-grpc/doc/
DPROTOCOL-WEB.md71 2. 8th (MSB) bit of the 1st gRPC frame byte
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
DRISCVInstrFormats.td15 // MSB (31st bit) on the left and the LSB (0th bit) on the right. This is
/external/openssh/
DPROTOCOL.agent31 The "uint16" data type is a simple MSB-first 16 bit unsigned integer
43 eight bits per byte in big-endian (MSB first) format.

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