Searched refs:Multu (Results 1 – 15 of 15) sorted by relevance
/external/llvm/lib/Target/Mips/ |
D | MipsISelLowering.h | 85 Multu, enumerator
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D | MipsSEISelLowering.cpp | 366 case ISD::UMUL_LOHI: return lowerMulDiv(Op, MipsISD::Multu, true, true, DAG); in LowerOperation() 368 case ISD::MULHU: return lowerMulDiv(Op, MipsISD::Multu, false, true, DAG); in LowerOperation() 1547 return lowerDSPIntr(Op, DAG, MipsISD::Multu); in lowerINTRINSIC_WO_CHAIN()
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D | MipsISelLowering.cpp | 131 case MipsISD::Multu: return "MipsISD::Multu"; in getTargetNodeName()
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D | MipsInstrInfo.td | 99 def MipsMultu : SDNode<"MipsISD::Multu", SDT_MipsMultDiv>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsISelLowering.h | 136 Multu, enumerator
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D | MipsSEISelLowering.cpp | 452 case ISD::UMUL_LOHI: return lowerMulDiv(Op, MipsISD::Multu, true, true, DAG); in LowerOperation() 454 case ISD::MULHU: return lowerMulDiv(Op, MipsISD::Multu, false, true, DAG); in LowerOperation() 1531 return lowerDSPIntr(Op, DAG, MipsISD::Multu); in lowerINTRINSIC_WO_CHAIN()
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D | MipsISelLowering.cpp | 212 case MipsISD::Multu: return "MipsISD::Multu"; in getTargetNodeName()
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D | MipsInstrInfo.td | 105 def MipsMultu : SDNode<"MipsISD::Multu", SDT_MipsMultDiv>;
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/external/swiftshader/third_party/subzero/src/ |
D | IceInstMIPS32.h | 254 Multu, enumerator 1258 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>;
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/external/v8/src/mips/ |
D | macro-assembler-mips.h | 437 DEFINE_INSTRUCTION2(Multu);
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D | macro-assembler-mips.cc | 569 void TurboAssembler::Multu(Register rs, const Operand& rt) { in Multu() function in v8::internal::TurboAssembler
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/external/v8/src/mips64/ |
D | macro-assembler-mips64.h | 449 DEFINE_INSTRUCTION2(Multu);
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D | macro-assembler-mips64.cc | 589 void TurboAssembler::Multu(Register rs, const Operand& rt) { in Multu() function in v8::internal::TurboAssembler
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenFastISel.inc | 3209 // FastEmit functions for MipsISD::Multu. 3430 case MipsISD::Multu: return fastEmit_MipsISD_Multu_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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D | MipsGenDAGISel.inc | 24904 /* 46287*/ /*SwitchOpcode*/ 56, TARGET_VAL(MipsISD::Multu),// ->46346
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