Searched refs:NumRegClasses (Results 1 – 8 of 8) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterBank.inc | 111 …me */ "CC", /* Size */ 32, /* CoveredRegClasses */ CCRegBankCoverageData, /* NumRegClasses */ 100);
112 …*/ "FPR", /* Size */ 512, /* CoveredRegClasses */ FPRRegBankCoverageData, /* NumRegClasses */ 100);
113 … */ "GPR", /* Size */ 64, /* CoveredRegClasses */ GPRRegBankCoverageData, /* NumRegClasses */ 100);
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBank.cpp | 25 const uint32_t *CoveredClasses, unsigned NumRegClasses) in RegisterBank() argument
27 ContainedRegClasses.resize(NumRegClasses); in RegisterBank()
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 1002 const unsigned NumRegClasses; variable
1025 if (Base >= NumRegClasses) { in moveToNextID()
1026 ID = NumRegClasses; in moveToNextID()
1065 : NumRegClasses(TRI.getNumRegClasses()), Base(0), Idx(0), ID(0), in BitMaskClassIterator()
1072 bool isValid() const { return getID() != NumRegClasses; } in isValid()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenRegisterBank.inc | 80 …/ "FPRB", /* Size */ 128, /* CoveredRegClasses */ FPRRegBankCoverageData, /* NumRegClasses */ 103);
81 …*/ "GPRB", /* Size */ 32, /* CoveredRegClasses */ GPRRegBankCoverageData, /* NumRegClasses */ 103);
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 1070 const unsigned NumRegClasses; variable
1093 if (Base >= NumRegClasses) { in moveToNextID()
1094 ID = NumRegClasses; in moveToNextID()
1133 : NumRegClasses(TRI.getNumRegClasses()), Mask(Mask), CurrentChunk(*Mask) { in BitMaskClassIterator()
1139 bool isValid() const { return getID() != NumRegClasses; } in isValid()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenRegisterBank.inc | 108 …e */ "GPR", /* Size */ 64, /* CoveredRegClasses */ GPRRegBankCoverageData, /* NumRegClasses */ 86);
109 …/ "VECR", /* Size */ 512, /* CoveredRegClasses */ VECRRegBankCoverageData, /* NumRegClasses */ 86);
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | RegisterBank.h | 45 const uint32_t *CoveredClasses, unsigned NumRegClasses);
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenRegisterBank.inc | 61 …*/ "GPRB", /* Size */ 32, /* CoveredRegClasses */ GPRBRegBankCoverageData, /* NumRegClasses */ 73);
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