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Searched refs:PREFSLOT2VEC (Results 1 – 5 of 5) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUISelLowering.h42 PREFSLOT2VEC, ///< Promote scalar->vector enumerator
DSPUNodes.td117 def SPUprefslot2vec: SDNode<"SPUISD::PREFSLOT2VEC", SDTprefslot2vec, []>;
DSPUISelLowering.cpp480 node_names[(unsigned) SPUISD::PREFSLOT2VEC] = "SPUISD::PREFSLOT2VEC"; in getTargetNodeName()
929 Value = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, Value); in LowerSTORE()
1985 return DAG.getNode(SPUISD::PREFSLOT2VEC, dl, Op.getValueType(), Op0, Op0); in LowerSCALAR_TO_VECTOR()
2363 SDValue Promote = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, N, N); in LowerCTPOP()
2380 SDValue Promote = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, N, N); in LowerCTPOP()
2414 SDValue Promote = DAG.getNode(SPUISD::PREFSLOT2VEC, dl, vecVT, N, N); in LowerCTPOP()
2753 DAG.getNode(SPUISD::PREFSLOT2VEC, dl, mvt, Op0, Op0), in LowerSIGN_EXTEND()
3037 case SPUISD::PREFSLOT2VEC: { in PerformDAGCombine()
3180 case SPUISD::PREFSLOT2VEC: in computeMaskedBitsForTargetNode()
DSPUISelDAGToDAG.cpp691 HandleSDNode PromoteScalar(CurDAG->getNode(SPUISD::PREFSLOT2VEC, dl, in Select()
DSPUInstrInfo.td1425 // SPU::PREFSLOT2VEC and VEC2PREFSLOT re-interpretations of registers