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Searched refs:S5_WRITEDISABLE_ALPHA (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/gallium/drivers/i915/
Di915_state_emit.c138 …UNORM, { S5_WRITEDISABLE_BLUE, S5_WRITEDISABLE_GREEN, S5_WRITEDISABLE_RED, S5_WRITEDISABLE_ALPHA}}, in target_fixup()
139 …UNORM, { S5_WRITEDISABLE_BLUE, S5_WRITEDISABLE_GREEN, S5_WRITEDISABLE_RED, S5_WRITEDISABLE_ALPHA}}, in target_fixup()
140 … S5_WRITEDISABLE_RED | S5_WRITEDISABLE_GREEN | S5_WRITEDISABLE_BLUE, 0, 0, S5_WRITEDISABLE_ALPHA}}, in target_fixup()
141 … S5_WRITEDISABLE_RED | S5_WRITEDISABLE_GREEN | S5_WRITEDISABLE_BLUE, 0, 0, S5_WRITEDISABLE_ALPHA}}, in target_fixup()
142 …0, 0, S5_WRITEDISABLE_RED | S5_WRITEDISABLE_GREEN | S5_WRITEDISABLE_BLUE | S5_WRITEDISABLE_ALPHA}}, in target_fixup()
143 … { S5_WRITEDISABLE_RED, S5_WRITEDISABLE_GREEN, S5_WRITEDISABLE_BLUE, S5_WRITEDISABLE_ALPHA}} in target_fixup()
160 S5_WRITEDISABLE_BLUE | S5_WRITEDISABLE_ALPHA ); in emit_immediate_s5()
169 if (imm & S5_WRITEDISABLE_ALPHA) in emit_immediate_s5()
Di915_reg.h393 #define S5_WRITEDISABLE_ALPHA (1<<31) macro
Di915_state.c161 cso_data->LIS5 |= S5_WRITEDISABLE_ALPHA; in i915_create_blend_state()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_reg.h140 #define S5_WRITEDISABLE_ALPHA (1<<31) macro
Di915_state.c707 tmp |= S5_WRITEDISABLE_ALPHA; in i915ColorMask()