Home
last modified time | relevance | path

Searched refs:S5_WRITEDISABLE_RED (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/gallium/drivers/i915/
Di915_state_emit.c138 …MAT_R8G8B8A8_UNORM, { S5_WRITEDISABLE_BLUE, S5_WRITEDISABLE_GREEN, S5_WRITEDISABLE_RED, S5_WRITEDI… in target_fixup()
139 …MAT_R8G8B8X8_UNORM, { S5_WRITEDISABLE_BLUE, S5_WRITEDISABLE_GREEN, S5_WRITEDISABLE_RED, S5_WRITEDI… in target_fixup()
140 …{ PIPE_FORMAT_L8_UNORM, { S5_WRITEDISABLE_RED | S5_WRITEDISABLE_GREEN | S5_WRITEDISABLE_BLUE… in target_fixup()
141 …{ PIPE_FORMAT_I8_UNORM, { S5_WRITEDISABLE_RED | S5_WRITEDISABLE_GREEN | S5_WRITEDISABLE_BLUE… in target_fixup()
142 …{ PIPE_FORMAT_A8_UNORM, { 0, 0, 0, S5_WRITEDISABLE_RED | S5_WRITEDISABLE_GREEN | S5_WRITEDIS… in target_fixup()
143 …{ 0, { S5_WRITEDISABLE_RED, S5_WRITEDISABLE_GREEN, S5_WRITEDISABLE_BLUE, … in target_fixup()
159 uint fixup_imm = imm & ~( S5_WRITEDISABLE_RED | S5_WRITEDISABLE_GREEN | in emit_immediate_s5()
163 if (imm & S5_WRITEDISABLE_RED) in emit_immediate_s5()
Di915_reg.h394 #define S5_WRITEDISABLE_RED (1<<30) macro
Di915_state.c152 cso_data->LIS5 |= S5_WRITEDISABLE_RED; in i915_create_blend_state()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_reg.h141 #define S5_WRITEDISABLE_RED (1<<30) macro
Di915_state.c701 tmp |= S5_WRITEDISABLE_RED; in i915ColorMask()