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Searched refs:SC_DPLLCTRL (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/arch/arm/mach-uniphier/clk/
Ddpll-tail.c17 tmp = readl(SC_DPLLCTRL); in uniphier_ld4_dpll_ssc_en()
19 writel(tmp, SC_DPLLCTRL); in uniphier_ld4_dpll_ssc_en()
Ddpll-sld8.c36 tmp = readl(SC_DPLLCTRL); in uniphier_sld8_dpll_init()
43 writel(tmp, SC_DPLLCTRL); in uniphier_sld8_dpll_init()
Ddpll-pro4.c26 tmp = readl(SC_DPLLCTRL); in uniphier_pro4_dpll_init()
49 writel(tmp, SC_DPLLCTRL); in uniphier_pro4_dpll_init()
Ddpll-ld4.c26 tmp = readl(SC_DPLLCTRL); in uniphier_ld4_dpll_init()
45 writel(tmp, SC_DPLLCTRL); in uniphier_ld4_dpll_init()
Dpll-ld11.c18 #define SC_DPLLCTRL (SC_BASE_ADDR | 0x1460) /* DDR memory */ macro
38 uniphier_ld20_sscpll_ssc_en(SC_DPLLCTRL); in uniphier_ld11_pll_init()
/external/u-boot/arch/arm/mach-uniphier/
Dsc-regs.h19 #define SC_DPLLCTRL (SC_BASE_ADDR | 0x1200) macro